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参数资料
| 型号： | MB9BF505NBGL |
| 元件分类： | 微控制器/微处理器 |
| 英文描述： | 32-BIT, FLASH, 80 MHz, RISC MICROCONTROLLER, PBGA112 |
| 封装： | 10 X 10 MM, 1.45 MM HEIGHT, 0.80 MM PITCH, PLASTIC, FBGA-112 |
| 文件页数： | 7/120页 |
| 文件大小： | 1277K |
| 代理商： | MB9BF505NBGL |
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104
8266D-MCU Wireless-06/12
ATmega128RFA1
9.12.2 AES_STATUS – AES Status Register
Bit
7
6
5
4
3
2
1
0
NA ($13D)
AES_ER
Res5
Res4
Res3
Res2
Res1
Res0
AES_DONE AES_STATUS
Read/Write
R
Initial Value
0
This read-only register signals the status of the security module and operation. Note
that the AES_STATUS register is cleared when entering the radio transceiver SLEEP
state.
Bit 7 – AES_ER - AES Operation Finished with Error
This register bit indicates an error during AES module run. An error occurs if accessing
AES_CTRL while an AES operation is running or if AES_KEY or AES_STATE Memory
is not loaded completely or less than 16 Byte read from AES_STATE.
Bit 6:1 – Res5:0 - Reserved
These bits are reserved for future use.
Bit 0 – AES_DONE - AES Operation Finished with Success
This register bit indicates a successfully finished operation of the AES module.
9.12.3 AES_STATE – AES Plain and Cipher Text Buffer Register
Bit
7
6
5
4
3
2
1
0
NA ($13E)
AES_STATE7:0
AES_STATE
Read/Write
RW
Initial Value
0
The AES_STATE register accesses a 16 byte internal data buffer. The buffer is
accessed by reading or writing 16 times to the same address location (AES_STATE). If
the buffer is not completely read or written an error occurs when an AES operation is
started. Note that the AES_STATE register is cleared when entering the radio
transceiver SLEEP state.
Bit 7:0 – AES_STATE7:0 - AES Plain and Cipher Text Buffer
These bits represent the data buffer for the AES operation.
9.12.4 AES_KEY – AES Encryption and Decryption Key Buffer Register
Bit
7
6
5
4
3
2
1
0
NA ($13F)
AES_KEY7:0
AES_KEY
Read/Write
RW
Initial Value
0
The AES key register accesses a 128 Bit internal buffer that holds the Encryption or
Decryption Key. The AES_KEY buffer is a 16 Byte buffer. The buffer is accessed by
reading or writing 16 fold to the same address location (AES_KEY). A read access to
registers AES_KEY returns the last round key of the preceding security operation. This
is the key that is required for the corresponding ECB decryption operation after an ECB
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相关代理商/技术参数 |
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| MB9BF506NABGL-GE1 | 制造商:FUJITSU 功能描述:MCU 32BIT CORTEX-M3 FM3 112BGA 制造商:FUJITSU 功能描述:MCU, 32BIT, CORTEX-M3, FM3, 112BGA, Controller Family/Series:ARM Cortex-M3, Core |
| MB9BF506NAPMC-G-JNE1 | 制造商:FUJITSU 功能描述: 制造商:FUJITSU 功能描述:MCU 32BIT CORTEX-M3 FM3 100LQFP 制造商:FUJITSU 功能描述:MCU, 32BIT, CORTEX-M3, FM3, 100LQFP 制造商:FUJITSU 功能描述:MCU, 32BIT, CORTEX-M3, FM3, 100LQFP, Controller Family/Series:ARM Cortex-M3, Core Size:32bit, No. of I/O's:80, Supply Voltage Min:2.7V, Supply Voltage Max:5.5V, Digital IC Case Style:LQFP, No. of Pins:100, Program Memory Size:512KB, , RoHS Compliant: Yes |
| MB9BF506NBBGL-GE1 | 制造商:FUJITSU 功能描述: |
| MB9BF506NBPMC-G-JNE2 | 制造商:FUJITSU 功能描述: |
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