参数资料
| 型号： | MC14LC5540DW |
| 厂商： | Freescale Semiconductor |
| 文件页数： | 2/28页 |
| 文件大小： | 0K |
| 描述： | IC CODEC ADPCM 28-SOIC W |
| 标准包装： | 26 |
| 类型： | ADPCM 编解码器/滤波器 |
| 数据接口： | PCM 音频接口 |
| 分辨率（位）： | 13 b |
| ADC / DAC 数量： | 1 / 1 |
| 三角积分调变： | 无 |
| 电压 - 电源，数字： | 4.5V ~ 5.5V |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 28-SOIC（0.295"，7.50mm 宽） |
| 供应商设备封装： | 28-SOIC W |
| 包装： | 管件 |
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MC145484
MOTOROLA
10
telephones, DSP front–end, etc.) special care must be taken
to assure optimum analog transmission performance.
PC BOARD MOUNTING
It is recommended that the device be soldered to the PC
board for optimum noise performance. If the device is to be
used in a socket, it should be placed in a low parasitic pin
inductance (generally, low–profile) socket.
POWER SUPPLY, GROUND, AND NOISE
CONSIDERATIONS
This device is intended to be used in switching applica-
tions which often require plugging the PC board into a rack
with power applied. This is known as ‘‘hot–rack insertion.’’ In
these applications care should be taken to limit the voltage
on any pin from going positive of the VDD pins, or negative of
the VSS pins. One method is to extend the ground and power
contacts of the PCB connector. The device has input protec-
tion on all pins and may source or sink a limited amount of
current without damage. Current limiting may be accom-
plished by series resistors between the signal pins and the
connector contacts.
The most important considerations for PCB layout deal
with noise. This includes noise on the power supply, noise
generated by the digital circuitry on the device, and cross
coupling digital or radio frequency signals into the audio sig-
nals of this device. The best way to prevent noise is to:
1. Keep digital signals as far away from audio signals as
possible.
2. Keep radio frequency signals as far away from the audio
signals as possible.
3. Use short, low inductance traces for the audio circuitry
to reduce inductive, capacitive, and radio frequency
noise sensitivities.
4. Use short, low inductance traces for digital and RF
circuitry to reduce inductive, capacitive, and radio
frequency radiated noise.
5. Bypass capacitors should be connected from the VDD,
VAG Ref, and VAG pins to VSS with minimal trace
length. Ceramic monolithic capacitors of about 0.1
F
are acceptable for the VDD and VAG Ref pins to decouple
the device from its own noise. The VDD capacitor helps
supply the instantaneous currents of the digital circuitry
in addition to decoupling the noise which may be
generated by other sections of the device or other
circuitry on the power supply. The VAG Ref decoupling
capacitor is effecting a low–pass filter to isolate the
mid–supply voltage from the power supply noise gener-
ated on–chip as well as external to the device. The VAG
decoupling capacitor should be about 0.01
F. This
helps to reduce the inpedance of the VAG pin to VSS at
frequencies above the bandwidth of the VAG generator,
which reduces the susceptibility to RF noise.
6. Use a short, wide, low inductance trace to connect the
VSS ground pin to the power supply ground. The VSS
pin is the digital ground and the most negative power
supply pin for the analog circuitry. All analog signal
processing is referenced to the VAG pin, but because
digital and RF circuitry will probably be powered by this
same ground, care must be taken to minimize high
frequency noise in the VSS trace. Depending on the
application, a double–sided PCB with a VSS ground
plane connecting all of the digital and analog VSS pins
together would be a good grounding method. A multi-
layer PC board with a ground plane connecting all of the
digital and analog VSS pins together would be the optimal
ground configuration. These methods will result in the
lowest resistance and the lowest inductance in the
ground circuit. This is important to reduce voltage spikes
in the ground circuit resulting from the high speed digital
current spikes. The magnitude of digitally induced
voltage spikes may be hundreds of times larger than the
analog signal the device is required to digitize.
7. Use a short, wide, low inductance trace to connect the
V DD power supply pin to the 5 V power supply.
Depending on the application, a double–sided PCB with
VDD bypass capacitors to the VSS ground plane, as
described above, may complete the low impedance
coupling for the power supply. For a multilayer PC board
with a power plane, connecting all of the VDD pins to the
power plane would be the optimal power distribution
method. The integrated circuit layout and packaging
considerations for the 5 V VDD power circuit are
essentially the same as for the VSS ground circuit.
8. The VAG pin is the reference for all analog signal
processing. In some applications the audio signal to be
digitized may be referenced to the VSS ground. To
reduce the susceptibility to noise at the input of the ADC
section, the three–terminal op amp may be used in a
differential to single–ended circuit to provide level
conversion from the VSS ground to the VAG ground with
noise cancellation. The op amp may be used for more
than 35 dB of gain in microphone interface circuits, which
will require a compact layout with minimum trace lengths
as well as isolation from noise sources. It is recom-
mended that the layout be as symmetrical as possible to
avoid any imbalances which would reduce the noise
cancelling benefits of this differential op amp circuit.
Refer to the application schematics for examples of this
circuitry.
If possible, reference audio signals to the VAG pin
instead of to the VSS pin. Handset receivers and tele-
phone line interface circuits using transformers may be
audio signal referenced completely to the VAG pin. Re-
fer to the application schematics for examples of this
circuitry. The VAG pin cannot be used for ESD or line
protection.
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