参数资料
型号: MC33560DTB
厂商: ON Semiconductor
文件页数: 20/26页
文件大小: 0K
描述: OC PWR MGMT READERS/CPLR 24TSSOP
标准包装: 62
系列: *
应用: *
接口: *
电源电压: *
封装/外壳: 24-TSSOP(0.220",5.60mm 宽)
供应商设备封装: 24-TSSOP
包装: 管件
安装类型: 表面贴装
MC33560
http://onsemi.com
3
ELECTRICAL CHARACTERISTICS These specifications are written in the same style as common for standard
integrated circuits. The convention considers current flowing into the pin (sink current) as positive and current flowing out of the pin
(source current) as negative. (Conditions: VBAT = 4.0 V, VCC = 5.0 V nom, PWRON = VBAT , Operating Mode, ICC = 10 mA, 25°C ≤ TA
≤ 85°C, L1 = 47 mH, RLIM = 0 W, CRDVCC capacitor = 10 mF, unless otherwise noted.)
Characteristic
Test Conditions
Symbol
Min
Typ
Max
Unit
BATTERY POWER SUPPLY SECTION
Supply Voltage Range
Normal operating range extended operating range (Note 4)
VBAT
2.2
1.8
6.0
6.6
V
MC33560 Standby Quiescent Current
PWRON = GND, CRDCON = GND, ASYCLKIN = GND, VBAT = 6.0 V,
All Other Logic Inputs and Outputs Open
IoBAT
30
mA
DC Operating Current
ICC = 10 mA; VCC = 5.0 V, VBAT = 6.0 V
IBATop
12.5
mA
VBAT Undervoltage Detection:
Upper Threshold
Lower Threshold
Hysteresis
1.6
1.4
0.2
V
VCC = 5.0 V NOMINAL POWER SUPPLY SECTION
Output Voltage
2.2 V
v VBAT v 6.0 V
1.0 mA
v ICC v 25 mA
3.0 V
v VBAT v 6.0 V
1.0 mA
v ICC v 60 mA
VCC
4.75
4.60
5.0
5.25
5.40
V
Card VCC Undervoltage Detection:
Upper Threshold
Lower Threshold
Switching Hysteresis
(RDYMOD Output)
(See Table 4)
VT5H
VT5L
VHYS5
4.2
120
4.5
180
VCC 0.14
V
mV
Peak Output Current
VCC = 4.0 V, Internally Limited
(RDYMOD = L)
ICClim
80
mA
Current limit timeout
VCC = 4.0 V
td
160
ms
Startup Current
VCC = 2.0 V; 0°C to +85°C
40
°C to 0°C
ICCst
80
50
mA
Low Side Switch Saturation Voltage
IL = 50 mA, Pin 22
Vsat22
100
160
mV
Rectifier on Saturation Voltage
IL = 50 mA, Pin 22 to Pin 13
VFsat22
400
520
mV
Converter Switching Frequency
TA = 25°C
fsw
120
kHz
Shutdown Current
(Card access deactivated)
PWRON = GND, VCC = 2.0 V
ISD
80
mA
VCC = 3.0 V NOMINAL POWER SUPPLY SECTION (VBAT = 2.5 V, ICC = 5.0 mA)
Output Voltage
2.2 V
v VBAT v 6.0 V
1.0 mA
v ICC v 10 mA
2.5 V
v VBAT v 6.0 V
1.0 mA
v ICC v 50 mA
VCC
2.75
2.60
3.0
3.25
3.40
V
Card VCC Undervoltage Detection:
Upper Threshold
Lower Threshold
Switching Hysteresis
(RDYMOD Output)
(See Table 4)
VT3H
VT3L
VHYS3
2.4
80
2.7
110
VCC 0.1
V
mV
Startup Current
Shutdown Current
(Card access deactivated)
VCC = 2.0 V
PWRON = GND, VCC = 2.0 V
ICCst
ISD
50
mA
4. See Figures 2 and 3.
5. The transistors T1 on lines IO, C4 and C8 (see Figure 24) have a max Rdson of 250 W.
6. Pin loading = 30 pF, except INVOUT = 15 pF.
7. As the clock buffer is optimized for low power consumption and hence not symmetrical, clock signal duty cycle is guaranteed for divide
by 2 and divide by 4 ratio.
8. In either direction.
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