参数资料
型号: MC33560DTB
厂商: ON Semiconductor
文件页数: 3/26页
文件大小: 0K
描述: OC PWR MGMT READERS/CPLR 24TSSOP
标准包装: 62
系列: *
应用: *
接口: *
电源电压: *
封装/外壳: 24-TSSOP(0.220",5.60mm 宽)
供应商设备封装: 24-TSSOP
包装: 管件
安装类型: 表面贴装
MC33560
http://onsemi.com
11
Table 1. PIN FUNCTION DESCRIPTION
Pin
Name/Function
Type
Symbol
CARD INTERFACE
19
CRDC8
I/O
General purpose input/output. It has the same behavior as CRDIO. It can be connected to the
C8 pin of the card connector.
CURRENT LIMIT AND THERMAL PROTECTION
1
PGND
POWER
This pin is the return path for the current flowing into Pin 22 (L1). It must be connected to
CRDGND using appropriate grounding techniques.
12
CRDGND
POWER
This pin is the signal ground. It must be connected to the ground pin of the card connector. It is
the reference level for all analog and digital signals.
13
CRDVCC
POWER
This pin connects to the VCC pin of the card connector. It is the reference level for a logic “1” of
Pins 11, 14, 15, 16 and 19.
22
L1
POWER
This pin connects to an external inductance for the DCDC converter. Please refer to the
description of the DCDC converter functional block.
23
VBAT
POWER
This pin is connected to the supply voltage. Logic level “1” of Pins 2 to 10, 17, 18, 20 and 21 is
referenced to VBAT. Operation of the MC33560 is inhibited when VBAT is lower than the
minimum value.
24
ILIM
POWER
This pin can be connected to the PGND pin, or to a resistor connected to PGND, or left open,
depending on the peak coil current needed to supply the card.
PROGRAMMING AND STATUS FUNCTIONS
The MC33560 features a programming interface and a status interface. Figure 20 shows how to enter and exit programming
mode; Table 2 shows which pins are used to access the various functions.
PWRON
CS
RDYMOD (in)
IO
RESET
PROGRAM DATA VALUE
ENTER
PROGRAMMING
MODE
LATCH
PROGRAM
VALUE
EXIT
PROGRAMMING
MODE
Figure 20. MC33560 Programming Sequence
Table 2. PIN USE FOR PROGRAMMING AND STATUS FUNCTIONS
Programs CRDV-
CC
TO 3 V/5 V
Select VCC
ON/OFF
Select
Clock Input
Program ASYCLKIN
Divide Ratio
Poll Card
Status
Poll CRDVCC
Status
RDYMOD
(In/Out)
Force to 0
READ
Force to 0
READ
CS (In)
rising edge
0
rising edge
0
PWRON
0/1
Programs CRDVCC
0 or Hiz
1
RESET(In)
Programs CLK
Input/Divide Ratio
NOT USED
0/1
NOT USED
I/O(In)
Programs CLK
Input/Divide Ratio
NOT USED
0/1
NOT USED
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