参数资料
型号: MC33911BAC
厂商: Freescale Semiconductor
文件页数: 45/92页
文件大小: 0K
描述: IC SYSTEM BASIS CHIP 32LQFP
标准包装: 250
应用: 系统基础芯片
电流 - 电源: 4.5mA
电源电压: 5.5 V ~ 27 V
工作温度: -40°C ~ 125°C
安装类型: 表面贴装
封装/外壳: 32-LQFP
供应商设备封装: 32-LQFP(7x7)
包装: 托盘
MC33911G5AC/MC3433911G5AC
FUNCTIONAL DEVICE OPERATIONS
LOGIC COMMANDS AND REGISTERS
WDOFF - Watchdog Off
This read-only bit signals that the watchdog pin connected to
Ground and therefore disabled. In this case watchdog
timeouts are disabled and the device automatically enters
Normal mode out of Reset. This might be necessary for
software debugging and for programming the Flash memory.
Configuration Register - CFR
This register controls the cyclic sense timing multiplier.
Table 28. Configuration Register - $D
C3 C2 C1 C0
1 = Watchdog is disabled
0 = Watchdog is enabled
WDWO - Watchdog Window Open
This read-only bit signals when the watchdog window is open
for clears. The purpose of this bit is for testing. Should be
ignored in case WDERR is High.
Write
Reset
Value
Reset
Condition
0
0
POR, Reset mode
or ext_reset
CYSX8
0
POR
0
0
POR
0
0
POR
1 = Watchdog window open
0 = Watchdog window closed
Analog Multiplexer Control Register - MUXCR
This register controls the analog multiplexer and selects the
divider ration for the Lx input divider.
Table 26. Analog Multiplexer Control Register -$C
C3 C2 C1 C0
Write LXDS MX2 MX1 MX0
Reset Value 1 0 0 0
CYSX8 - Cyclic Sense Timing x 8.
This write-only bit influences the cyclic sense and Forced
Wake-up period as shown in Table 24 .
1 = Multiplier enabled
0 = None
Interrupt Mask Register - IMR
This register allows masking of some of the interrupt sources.
No interrupt will be generated to the MCU and no flag will be
set in the ISR register. The 5.0V Regulator over-temperature
prewarning interrupt and Under-voltage (VSUV) interrupts
can not be masked and will always cause an interrupt.
Writing to the IMR will return the ISR.
Reset Condition
POR
POR, Reset mode or ext_reset
Table 29. Interrupt Mask Register - $E
LXDS - Lx Analog Input Divider Select
C3
C2
C1
C0
This write-only bit selects the resistor divider for the Lx analog
inputs. Voltage is internally clamped to VDD.
0 = Lx Analog divider: 1
Write
Reset Value
HSM
1
LSM
1
LINM
1
VMM
1
1 = Lx Analog divider: 3.6 (typ.)
Reset Condition
POR
MXx - Analog Multiplexer Input Select
These write-only bits selects which analog input is
multiplexed to the ADOUT0 pin according to Table 27 .
When disabled or when in Stop or Sleep mode, the output
buffer is not powered and the ADOUT0 output is left floating
to achieve lower current consumption.
Table 27. Analog Multiplexer Channel Select
HSM - High Side Interrupt Mask
This write-only bit enables/disables interrupts generated in
the high side block.
1 = HS Interrupts Enabled
0 = HS Interrupts Disabled
LSM - Low Side Interrupt Mask
MX2
0
0
0
0
1
1
1
1
MX1
0
0
1
1
0
0
1
1
MX0
0
1
0
1
0
1
0
1
Meaning
Disabled
Reserved
Die Temperature Sensor
VSENSE input
L1 input
L2 input
Reserved
Reserved
This write-only bit enables/disables interrupts generated in
the low side block.
1 = LS Interrupts Enabled
0 = LS Interrupts Disabled
LINM - LIN Interrupts Mask
This write-only bit enables/disables interrupts generated in
the LIN block.
1 = LIN Interrupts Enabled
0 = LIN Interrupts Disabled
33911
Analog Integrated Circuit Device Data ?
Freescale Semiconductor
45
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