参数资料
型号: MC33931VWR2
厂商: Freescale Semiconductor
文件页数: 15/26页
文件大小: 0K
描述: IC H-BRIDGE THROTTLE CTRL 44HSOP
标准包装: 750
类型: 半桥
输入类型: 非反相
输出数: 2
导通状态电阻: 120 毫欧
电流 - 峰值输出: 5A
电源电压: 5 V ~ 28 V
工作温度: -40°C ~ 125°C
安装类型: 表面贴装
封装/外壳: 44-BSSOP(0.433",11.00mm 宽)裸露焊盘
供应商设备封装: 44-HSOP
包装: 带卷 (TR)
FUNCTIONAL DEVICE OPERATION
PROTECTION AND DIAGNOSTIC FEATURES
The output stage will always switch into the mode defined
by the input pins (IN1, IN2, D1, and EN/D2), provided the
device junction temperature is within the specified operating
temperature range.
INTERNAL PWM CURRENT LIMITING
The maximum current flow under normal operating
conditions should be less than 5.0 A. The instantaneous load
currents will be limited to I LIM via the internal PWM current
limiting circuitry. When the I LIM threshold current value is
reached, the output stages are tri-stated for a fixed time (T A )
of 20 μs typical. Depending on the time constant associated
with the load characteristics, the output current decreases
during the tri-state duration until the next output ON cycle
occurs.
The PWM current limit threshold value is dependent on the
device junction temperature. When - 40 °C < T J < 160 °C,
I LIM is between the specified minimum/maximum values.
When T J exceeds 160 °C, the I LIM threshold decreases to
4.2 A. Shortly above 175 °C the device over-temperature
To reset from this condition, D1 must change from logic
HIGH to logic LOW, or EN/D2 must change from logic LOW
to logic HIGH. When reset, the output stage switches ON
again, provided that the junction temperature is now below
the over-temperature threshold limit minus the hysteresis.
Important Resetting from the fault condition will clear the
fault status flag. Powering down and powering up the device
will also reset the 33931 from the fault condition.
OUTPUT AVALANCHE PROTECTION
If VPWR were to become an open circuit, the outputs
would likely tri-state simultaneously due to the disable logic.
This could result in an unclamped inductive discharge. The
VPWR input to the 33931 should not exceed 40 V during this
transient condition, to prevent electrical overstress of the
output drivers.This can be accomplished with a zener clamp
or MOV, and/or an appropriately valued input capacitor with
sufficiently low ESR (see Figure 13 ).
circuit will detect t LIM and an over-temperature shutdown will
occur. This feature implements a graceful degradation of
operation before thermal shutdown occurs, thus allowing for
intermittent unexpected mechanical loads on the motor ’s
gear-reduction train to be handled.
Important Die temperature excursions above 150 ° C are
permitted only for non-repetitive durations < 30 seconds.
Provision must be made at the system level to prevent
prolonged operation in the current-foldback region.
VPW R
Bulk
Low ESR
Cap.
100nF
9
VPW R
I/Os
OUT1
M
OUT2
OVER-TEMPERATURE SHUTDOWN AND
HYSTERESIS
If an over-temperature condition occurs, the power outputs
are tri-stated (latched-OFF) and the fault status flag (SF) is
AGND
PGND
SET to logic LOW.
Figure 13. Avalanche Protection
33931
Analog Integrated Circuit Device Data
Freescale Semiconductor
15
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