参数资料
型号: MC33931VWR2
厂商: Freescale Semiconductor
文件页数: 4/26页
文件大小: 0K
描述: IC H-BRIDGE THROTTLE CTRL 44HSOP
标准包装: 750
类型: 半桥
输入类型: 非反相
输出数: 2
导通状态电阻: 120 毫欧
电流 - 峰值输出: 5A
电源电压: 5 V ~ 28 V
工作温度: -40°C ~ 125°C
安装类型: 表面贴装
封装/外壳: 44-BSSOP(0.433",11.00mm 宽)裸露焊盘
供应商设备封装: 44-HSOP
包装: 带卷 (TR)
PIN CONNECTIONS
Table 1. 33931 Pin Definitions (continued)
A functional description of each pin can be found in the Functional Description section beginning on page 11 .
Pin
HSOP
(VW)
41
Pin
SOICW-EP
(EK)
28
Pin
Name
CCP
Pin
Function
Analog
Formal Name
Charge Pump
Definition
External reservoir capacitor connection for the internal charge
Output
Capacitor
pump; connected to VPWR. Allowable values are 30 nF to
100 nF. Note: This capacitor is required for the proper
performance of the device.
42
29
IN2
Logic Input
Input 2
Logic input control of OUT2;e.g., when IN2 is logic HIGH, OUT2
is set to VPWR, and when IN2 is logic LOW, OUT2 is set to
PGND. (Schmitt trigger Input with ~ 80 μ A source so default
condition = OUT2 HIGH.)
43
31
IN1
Logic Input
Input 1
Logic input control of OUT1; e.g., when IN1 is logic HIGH, OUT1
is set to VPWR, and when IN1 is logic LOW, OUT1 is set to
PGND. (Schmitt trigger Input with ~ 80 μ A source so default
condition = OUT1 HIGH.)
44
32
SF
Logic
Status Flag
Open drain active LOW Status Flag output (requires an external
Output -
Open Drain
(Active Low)
pull-up resistor to V DD . Maximum permissible load current
< 0.5 mA. Maximum V SFLOW < 0.4 V @ 0.3 mA. Maximum
permissible pull-up voltage < 7.0 V.)
TAB
12-33
1
4, 6, 9, 12-14,
AGND
N/C
Analog
Ground
None
Analog Signal
Ground
No Connect
The low-current analog signal ground must be connected to
PGND via low-impedance path (<10 m Ω , 0 Hz to 20 kHz).
Pin is not used
19-21, 24, 27,
30
EP
EP
Thermal
Exposed Pad
Exposed TAB is also the main heatsinking path for the device and
Pad
must be connected to GND.
33931
Analog Integrated Circuit Device Data
4
Freescale Semiconductor
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