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参数资料
| 型号： | MC35XS3500PNA |
| 厂商： | Freescale Semiconductor |
| 文件页数： | 32/45页 |
| 文件大小： | 0K |
| 描述： | IC SWITCH HIGHSIDE 24PQFN |
| 标准包装： | 168 |
| 类型： | 高端开关 |
| 输出数： | 5 |
| Rds（开）： | * |
| 内部开关： | 是 |
| 电流限制： | 9A |
| 输入电压： | 7 V ~ 20 V |
| 工作温度： | -40°C ~ 125°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 24-PowerQFN |
| 供应商设备封装： | 24-PQFN（12x12） |
| 包装： | 托盘 |
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FUNCTIONAL DEVICE OPERATION
LOGIC COMMANDS AND REGISTERS
? if the device was in Normal mode: the output
Output current
OCHI1
OCHI2
OCLO
corresponding register (bit D7) must be rewritten D7=1.
Application of complete OCHI window depends on
toggling or not toggling D7 bit.
? if the device was in Fail mode, the failure is locked until
restart of the device: wake-up from Sleep mode or
V BATPOR1 .
For OCHI2 and OCLO:
? if the device was in Normal mode: the output
corresponding register (bit D7) must be rewritten D7=1.
Application of complete OCHI window depends on
toggling or not toggling D7 bit.
t1
t2
time
? if the device was in Fail mode, autorestart is activated.
The device autorestart feature provides a fixed duty
cycle and fixed period with OCHI1 window. ?
Figure 12. Double Over-current Window in Normal Mode
OCHI (I OCHI1 and then I OCHI2 ) is only activated after
toggling the D7 bit in Normal mode. During the output
switching, the severe short-circuit condition provided on the
module connector is reported as an OCHI fault. In Fail mode,
the control of OCHI window is provided by the toggles:
IGN_ON, Flasher_ON. The current thresholds (I OCHI1 , I OCHI2
and I OCLO ) and the time (t 1 and t 2 ) are fixed numbers for each
driver. After t 2, the OCLO current threshold is set to protect in
steady state. t 1 and t 2 times are compared to “on” state
duration (t ON ) of the output. In case of the output is controlled
in PWM mode during the inrush period, the t ON corresponds
to the sum of each “on” state duration in order to expand
dynamically the transient over-current profile.
In case of an overload (OCHI1 or OCHI2 or OCLO
detection), the corresponding output is disabled immediately.
The fault is latched and the status is reported via the SPI. To
delatch the fault, the failure condition must be removed and:
For OCHI1:
autorestart feature resets OCHI2 or OCLO fault after
corresponding Autorestart period.
The SPI fault reports are removed after a read operation:
- OC bit=(OCHI1) or (OCHI2) fault
- OVL bit=(OCHI1) or (OCHI2) or (OCLO) fault
Over-voltage detection and active clamp
The 35XS3500 provides an active gate clamp circuit, in
order to limit the maximum drain to source voltage.
In case of overload on an output, the corresponding switch
(OUT[1 to 5]) is turned off which leads to a high voltage at
VBAT, with an inductive V BAT line. The maximum VBAT
voltage is limited at V BATCLAMP by active clamp circuitry
through the load. In case of open load condition, the positive
transient pulses (ISO 7637 pulse 2 and inductive battery line)
shall be handled by the application.
Figures 13 and 14 describe the faults management in
Normal mode and Fail mode.
35XS3500
Analog Integrated Circuit Device Data ?
32
Freescale Semiconductor
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