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| 型号： | MC38HC705J2 |
| 厂商： | Motorola, Inc. |
| 元件分类： | DC/DC变换器 |
| 英文描述： | RTS Series - Econoline Unregulated DC-DC Converters; Input Voltage (Vdc): 05V; Output Voltage (Vdc): 3.3V; Power: 2W; Assembly; High Power Density; Optional Continuous Short Circuit Protected; Efficiency to 85% |
| 中文描述： | M68HC05系列系列8位微控制器单元 |
| 文件页数： | 28/78页 |
| 文件大小： | 427K |
| 代理商： | MC38HC705J2 |
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MC68HC705J2
CENTRAL PROCESSOR UNIT
MOTOROLA
4-9
4.3.5 Indexed, No Offset
Indexed instructions with no offset are one-byte instructions that can access
data with variable addresses within the first 256 memory locations. The index
register contains the low byte of the operand's conditional address. The CPU
automatically uses $00 as the high byte of the operand's conditional address,
so these instructions can address locations $0000–$00FF.
Indexed, no offset instructions are often used to move a pointer through a table
or to hold the address of a frequently used RAM or I/O location. Table 4-5 lists
the instructions that use the indexed, no offset addressing mode.
4.3.6 Indexed, 8-Bit Offset
Indexed, 8-bit offset instructions are two-byte instructions that can access data
with variable addresses within the first 511 memory locations. The CPU adds
the unsigned byte in the index register to the unsigned byte following the
opcode. The sum is the conditional address of the operand. These instructions
can address locations $0000–$01FE.
Indexed, 8-bit offset instructions are useful for selecting the kth element in an
n-element table. The table can begin anywhere within the first 256 memory
locations and could extend as far as location 510 ($01FE). The k value would
typically be in the index register, and the address of the beginning of the table
would be in the byte following the opcode. Table 4-5 lists the instructions that
use the indexed, 8-bit offset addressing mode.
4.3.7 Indexed, 16-Bit Offset
Indexed, 16-bit offset instructions are three-byte instructions that can access
data with variable addresses at any location in memory. The CPU adds the
unsigned byte in the index register to the two unsigned bytes following the
opcode. The sum is the conditional address of the operand. The first byte after
the opcode is the high byte of the 16-bit offset; the second byte is the low byte of
the offset. These instructions can address any location in memory.
Indexed, 16-bit offset instructions are useful for selecting the kth element in an
n-element table anywhere in memory.
As with direct and extended addressing, the Motorola assembler determines the
shortest form of indexed addressing. Table 4-5 lists the instructions that can
use the indexed, 16-bit offset addressing mode.
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