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| 型号： | MC38HC705J2 |
| 厂商： | Motorola, Inc. |
| 元件分类： | DC/DC变换器 |
| 英文描述： | RTS Series - Econoline Unregulated DC-DC Converters; Input Voltage (Vdc): 05V; Output Voltage (Vdc): 3.3V; Power: 2W; Assembly; High Power Density; Optional Continuous Short Circuit Protected; Efficiency to 85% |
| 中文描述： | M68HC05系列系列8位微控制器单元 |
| 文件页数： | 56/78页 |
| 文件大小： | 427K |
| 代理商： | MC38HC705J2 |
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MOTOROLA
6-4
MEMORY
MC68HC705J2
6.1.3 EPROM
Two Kbytes of user EPROM for storage of program instructions and fixed data
are located at addresses $0700–$0EFF. The eight addresses from $0FF8–
$0FFF are EPROM locations reserved for interrupt vectors and reset vectors.
Eight additional EPROM bytes are located at $0FF0–$0FF8. There are two
ways to write data to the EPROM:
The EPROM programming register contains the control bits for
programming the EPROM on a byte-by-byte basis.
The bootloader ROM contains routines to download the contents of an
external memory device to the on-chip EPROM.
6.1.3.1 EPROM Programming
The EPROM programming register, shown in Figure 6-3, contains the control
bits for programming the EPROM.
PROG —
EPROM Programming Register
$001C
Bit 7
0
0
6
0
0
5
0
0
4
0
0
3
0
0
2
1
0
0
Bit 0
EPGM
0
LATCH
0
RESET
Figure 6-3. EPROM Programming Register (PROG)
LATCH — EPROM Bus Latch
This read/write bit causes address and data buses to be latched for EPROM
programming. Clearing the LATCH bit automatically clears the EPGM bit.
1 = Address and data buses configured for EPROM programming
0 = Address and data buses configured for normal operation
EPGM — EPROM Programming
This read/write bit applies programming power to the EPROM. To write the EPGM
bit, the LATCH bit must already be set.
1 = EPROM programming power switched on
0 = EPROM programming power switched off
Bits 7–3 and 1 — Not used; always read as zeros.
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