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| 型号： | MC38HC705J2 |
| 厂商： | Motorola, Inc. |
| 元件分类： | DC/DC变换器 |
| 英文描述： | RTS Series - Econoline Unregulated DC-DC Converters; Input Voltage (Vdc): 05V; Output Voltage (Vdc): 3.3V; Power: 2W; Assembly; High Power Density; Optional Continuous Short Circuit Protected; Efficiency to 85% |
| 中文描述： | M68HC05系列系列8位微控制器单元 |
| 文件页数： | 78/78页 |
| 文件大小： | 427K |
| 代理商： | MC38HC705J2 |
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MC68HC705J2
ELECTRICAL SPECIFICATIONS
MOTOROLA
10-11
OSC1 PIN
VDD
4064cyc
INTERNA
CLOCK
INTERNA
ADDRESS
BUS
INTERNA
DATA
BUS
0FFF
0FFE
0FFE
0FFE
0FFE
NEW
PCL
NEW
PCH
0FFE
0FFE
NOTES:
1. Internal clock, internal address bus, and internal data bus are not available externally.
2. Address of high byte of reset vector is $0FFE in MC68HC705J2 native mode and $07FE in MC68HC05J1 emulation mode.
3. Address of low byte of reset vector is $0FFF in MC68HC705J2 native mode and $07FF in MC68HC05J1 emulation mode.
POR THRESHOLD (TYPICALLY
tVDDR
1
1
1
2
2
2
2
2
2
3
Figure 10-8. Power-On Reset Timing
INTERNA
CLOCK
INTERNA
ADDRESS
BUS
RESET
NOTES:
1. Internal clock, internal address bus, and internal data bus signals are not available externally.
2. Next rising edge of internal clock after rising edge of RESET initiates reset sequence.
3. Address of high byte of reset vector is $0FFE in MC68HC705J2 native mode and $07FE in MC68HC05J1 emulation mode.
4. Address of low byte of reset vector is $0FFF in MC68HC705J2 native mode and $07FF in MC68HC05J1 emulation mode.
Figure 10-9. External Reset Timing
tRL
NEW PC
DUMMY
INTERNA
DATA
BUS
NEW PC
OP
CODE
0FFF
NEW
PCL
0FFE
NEW
PCH
0FFE
0FFE
0FFE3
3
3
3
4
2
1
1
1
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