参数资料
型号: MC56F8013VFAER2
厂商: FREESCALE SEMICONDUCTOR INC
元件分类: 数字信号处理
英文描述: 0-BIT, 8 MHz, OTHER DSP, PQFP32
封装: ROHS COMPLIANT, LQFP-32
文件页数: 36/125页
文件大小: 1702K
代理商: MC56F8013VFAER2
56F8013/56F8011 Data Sheet, Rev. 11
18
Freescale Semiconductor
2.2 56F8013/56F8011 Signal Pins
After reset, each pin is configured for its primary function (listed first). Any alternate functionality must
be programmed.
Table 2-3 56F8013/56F8011 Signal and Package Information for the 32-Pin LQFP
Signal
Name
LQFP
Pin No.
Type
State During
Reset
Signal Description
VDD
26
Supply
I/O Power — This pin supplies 3.3V power to the chip I/O interface.
VSS
13
Supply
VSS — These pins provide ground for chip logic and I/O drivers.
VSS
27
VDDA
8
Supply
ADC Power — This pin supplies 3.3V power to the ADC modules. It
must be connected to a clean analog power supply.
VSSA
9
Supply
ADC Analog Ground — This pin supplies an analog ground to the
ADC modules.
VCAP
25
Supply
VCAP — Connect this pin to a 2.2μF or greater capacitor required by
the internal voltage regulator output for proper chip operation. See
GPIOB6
(RXD)
(SDA1)
(CLKIN)
1
Input/
Output
Input
Input/
Output
Input
Input with
internal
pull-up
enabled
Port B GPIO — This GPIO pin can be individually programmed as
an input or output pin.
Receive Data — SCI receive data input.
Serial Data — This pin serves as the I2C serial data line.
Clock Input — This pin serves as an optional external clock input.
After reset, the default state is GPIOB6. The alternative peripheral
functionality is controlled via the SIM (See Section 6.3.8) and the
CLKMODE bit of the OCCS Oscillator Control Register.
1. This signal is also brought out on the GPIOB1 pin.
Return to Table 2-2
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