参数资料
型号: MC56F8155VFGE
厂商: Freescale Semiconductor
文件页数: 104/172页
文件大小: 0K
描述: IC DSP 16BIT 40MHZ 128-LQFP
标准包装: 72
系列: 56F8xxx
核心处理器: 56800E
芯体尺寸: 16-位
速度: 40MHz
连通性: EBI/EMI,SCI,SPI
外围设备: POR,PWM,WDT
输入/输出数: 49
程序存储器容量: 256KB(128K x 16)
程序存储器类型: 闪存
RAM 容量: 8K x 16
电压 - 电源 (Vcc/Vdd): 2.25 V ~ 3.6 V
数据转换器: A/D 16x12b
振荡器型: 外部
工作温度: -40°C ~ 105°C
封装/外壳: 128-LQFP
包装: 托盘
Registers
56F8355 Technical Data, Rev. 17
Freescale Semiconductor
37
Preliminary
3.2.3
External Clock Source
The recommended method of connecting an external clock is illustrated in Figure 3-4. The external clock
source is connected to XTAL and the EXTAL pin is grounded. Set OCCS_COHL bit high when using an
external clock source as well.
Figure 3-4 Connecting an External Clock Signal Register
3.3 Registers
When referring to the register definitions for the OCCS in the 56F8300 Peripheral User Manual, use the
register definitions without the internal Relaxation Oscillator, since the 56F8355/56F8155 devices do
NOT contain this oscillator.
Part 4 Memory Map
4.1 Introduction
The 56F8355 and 56F8155 devices are 16-bit motor-control chips based on the 56800E core. These parts
use a Harvard-style architecture with two independent memory spaces for Data and Program. On-chip
RAM and Flash memories are used in both spaces.
This section provides memory maps for:
Program Address Space, including the Interrupt Vector Table
Data Address Space, including the EOnCE Memory and Peripheral Memory Maps
On-chip memory sizes for each device are summarized in Table 4-1. Flash memories’ restrictions are
identified in the “Use Restrictions” column of Table 4-1.
Table 4-1 Chip Memory Configurations
On-Chip Memory
56F8355
56F8155
Use Restrictions
Program Flash
256KB
Erase/Program via Flash interface unit and word writes to CDBW
Data Flash
8KB
Erase/Program via Flash interface unit and word writes to CDBW.
Data Flash can be read via either CDBR or XDB2, but not by both
simultaneously
Program RAM
4KB
None
Data RAM
16KB
None
Program Boot Flash
16KB
Erase/Program via Flash Interface unit and word writes to CDBW
XTAL
EXTAL
External
VSS
Clock
Note: When using an external clocking source
with this configuration, the input “CLKMODE”
should be high and the COHL bit in the OSCTL
register should be set to 1.
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