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参数资料
型号： MC56F8155VFGE
厂商： Freescale Semiconductor
文件页数： 46/172页
文件大小： 0K
描述： IC DSP 16BIT 40MHZ 128-LQFP
标准包装： 72
系列： 56F8xxx
核心处理器： 56800E
芯体尺寸： 16-位
速度： 40MHz
连通性： EBI/EMI，SCI，SPI
外围设备： POR，PWM，WDT
输入/输出数： 49
程序存储器容量： 256KB（128K x 16）
程序存储器类型： 闪存
RAM 容量： 8K x 16
电压 - 电源 (Vcc/Vdd)： 2.25 V ~ 3.6 V
数据转换器： A/D 16x12b
振荡器型： 外部
工作温度： -40°C ~ 105°C
封装/外壳： 128-LQFP
包装： 托盘
56F8355 Technical Data, Rev. 17
14
Freescale Semiconductor
Preliminary
1.5 Product Documentation
The documents listed in Table 1-3 are required for a complete description and proper design with the
56F8355 and 56F8155 devices. Documentation is available from local Freescale distributors, Freescale
semiconductor
sales
offices,
Freescale
Literature
Distribution
Centers,
or
online
at
http://www.freescale.com.
Table 1-2 Bus Signal Names
Name
Function
Program Memory Interface
pdb_m[15:0]
Program data bus for instruction word fetches or read operations.
cdbw[15:0]
Primary core data bus used for program memory writes. (Only these 16 bits of the cdbw[31:0] bus
are used for writes to program memory.)
pab[20:0]
Program memory address bus. Data is returned on pdb_m bus.
Primary Data Memory Interface Bus
cdbr_m[31:0]
Primary core data bus for memory reads. Addressed via xab1 bus.
cdbw[31:0]
Primary core data bus for memory writes. Addressed via xab1 bus.
xab1[23:0]
Primary data address bus. Capable of addressing bytes1, words, and long data types. Data is written
on cdbw and returned on cdbr_m. Also used to access memory-mapped I/O.
1. Byte accesses can only occur in the bottom half of the memory address space. The MSB of the address will be forced
to 0.
Secondary Data Memory Interface
xdb2_m[15:0] Secondary data bus used for secondary data address bus xab2 in the dual memory reads.
xab2[23:0]
Secondary data address bus used for the second of two simultaneous accesses. Capable of
addressing only words. Data is returned on xdb2_m.
Peripheral Interface Bus
IPBus [15:0]
Peripheral bus accesses all on-chip peripherals registers. This bus operates at the same clock rate
as the Primary Data Memory and therefore generates no delays when accessing the processor.
Write data is obtained from cdbw. Read data is provided to cdbr_m.
Table 1-3 Chip Documentation
Topic
Description
Order Number
DSP56800E
Reference Manual
Detailed description of the 56800E family architecture,
and 16-bit controller core processor and the instruction
set
DSP56800EERM
56F8300 Peripheral User
Manual
Detailed description of peripherals of the 56F8300
devices
MC56F8300UM
56F8300 SCI/CAN
Bootloader User Manual
Detailed description of the SCI/CAN Bootloaders
56F8300 family of devices
MC56F83xxBLUM
相关PDF资料
PDF描述
MC56F8156VFVE IC DSP 16BIT 40MHZ 144-LQFP
MC56F8165VFGE IC DSP 16BIT 40MHZ 128-LQFP
MC56F8257VLH DSC 64K FLASH 60MHZ 64-LQFP
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相关代理商/技术参数
参数描述
MC56F8156 制造商:FREESCALE 制造商全称:Freescale Semiconductor, Inc 功能描述:16-bit Digital Signal Controllers
MC56F8156VFV 制造商:Rochester Electronics LLC 功能描述:- Bulk 制造商:Freescale Semiconductor 功能描述:
MC56F8156VFVE 功能描述:数字信号处理器和控制器 - DSP, DSC 16 BIT HYBRID CONTROLLER RoHS:否 制造商:Microchip Technology 核心:dsPIC 数据总线宽度:16 bit 程序存储器大小:16 KB 数据 RAM 大小:2 KB 最大时钟频率:40 MHz 可编程输入/输出端数量:35 定时器数量:3 设备每秒兆指令数:50 MIPs 工作电源电压:3.3 V 最大工作温度:+ 85 C 封装 / 箱体:TQFP-44 安装风格:SMD/SMT
MC56F8157 制造商:未知厂家 制造商全称:未知厂家 功能描述:16-BIT HYBRID CONTROLLERS
MC56F8157VPY 制造商:Rochester Electronics LLC 功能描述:- Bulk
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