参数资料
型号: MC68711E20VFNE2
厂商: Freescale Semiconductor
文件页数: 107/138页
文件大小: 0K
描述: IC MCU 8BIT 52-PLCC
标准包装: 23
系列: HC11
核心处理器: HC11
芯体尺寸: 8-位
速度: 4MHz
连通性: SCI,SPI
外围设备: POR,WDT
输入/输出数: 38
程序存储器容量: 20KB(20K x 8)
程序存储器类型: OTP
EEPROM 大小: 512 x 8
RAM 容量: 768 x 8
电压 - 电源 (Vcc/Vdd): 4.5 V ~ 5.5 V
数据转换器: A/D 8x8b
振荡器型: 内部
工作温度: -40°C ~ 105°C
封装/外壳: 52-LCC(J 形引线)
包装: 管件
Serial Communications Interface (SCI)
MC68HC711D3 Data Sheet, Rev. 2.1
70
Freescale Semiconductor
6.7.2 SCI Control Register 1
The SCI control register 1 (SCCR1) provides the control bits that determine word length and select the
method used for the wakeup feature.
R8 — Receive Data Bit 8
If M bit is set, R8 stores the ninth bit in the receive data character.
T8 — Transmit Data Bit 8
If M bit is set, T8 stores ninth bit in transmit data character.
M — Mode Bit
The mode bit selects character format
0 = Start bit, 8 data bits, 1 stop bit
1 = Start bit, 9 data bits, 1 stop bit
WAKE — Wakeup by Address Mark/Idle Bit
0 = Wakeup by IDLE line recognition
1 = Wakeup by address mark (most significant data bit set)
6.7.3 SCI Control Register 2
The SCI control register 2 (SCCR2) provides the control bits that enable or disable individual SCI
functions.
TIE — Transmit Interrupt Enable Bit
1 = TDRE interrupts disabled
1 = SCI interrupt requested when TDRE status flag is set
TCIE — Transmit Complete Interrupt Enable Bit
0 = TC interrupts disabled
1 = SCI interrupt requested when TC status flag is set
RIE — Receiver Interrupt Enable Bit
0 = RDRF and OR interrupts disabled
1 = SCI interrupt requested when RDRF flag or the OR status flag is set
Address:
$002C
Bit 7
654321
Bit 0
Read:
R8
T8
0
M
WAKE
0
Write:
Reset:
U
000000
U = Unaffected
Figure 6-4. SCI Control Register 1 (SCCR1)
Address:
$002D
Bit 7
654321
Bit 0
Read:
TIE
TCIE
RIE
ILIE
TE
RE
RWU
SBK
Write:
Reset:
00000000
Figure 6-5. SCI Control Register 2 (SCCR2)
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