参数资料
型号: MC68711E20VFNE2
厂商: Freescale Semiconductor
文件页数: 133/138页
文件大小: 0K
描述: IC MCU 8BIT 52-PLCC
标准包装: 23
系列: HC11
核心处理器: HC11
芯体尺寸: 8-位
速度: 4MHz
连通性: SCI,SPI
外围设备: POR,WDT
输入/输出数: 38
程序存储器容量: 20KB(20K x 8)
程序存储器类型: OTP
EEPROM 大小: 512 x 8
RAM 容量: 768 x 8
电压 - 电源 (Vcc/Vdd): 4.5 V ~ 5.5 V
数据转换器: A/D 8x8b
振荡器型: 内部
工作温度: -40°C ~ 105°C
封装/外壳: 52-LCC(J 形引线)
包装: 管件
Programmable Timer
MC68HC711D3 Data Sheet, Rev. 2.1
94
Freescale Semiconductor
8.4.4 Output Compare 1 Data Register
Use this register with OC1 to specify the data that is to be stored on the affected pin of port A after a
successful OC1 compare. When a successful OC1 compare occurs, a data bit in OC1D is stored in the
corresponding bit of port A for each bit that is set in OC1M.
If OC1Mx is set, data in OC1Dx is output to port A bit x on successful OC1 compares.
Bits 2–0 — Not implemented; always read 0.
8.4.5 Timer Counter Register
The 16-bit read-only timer count register (TCNT) contains the prescaled value of the 16-bit timer. A full
counter read addresses the most significant byte (MSB) first. A read of this address causes the least
significant byte (LSB) to be latched into a buffer for the next CPU cycle so that a double-byte read returns
the full 16-bit state of the counter at the time of the MSB read cycle.
In normal modes, TCNT is read-only.
Address:
$000D
Bit 7
654321
Bit 0
Read:
OC1D7
OC1D6
OC1D5
OC1D4
OC1D3
0
Write:
Reset:
00000000
Figure 8-9. Output Compare 1 Data Register (OC1D)
Address: $000E — TCNT High
Bit 15
14
13
12
11
10
9
Bit 8
Read:
Bit 15
Bit 14
Bit 13
Bit 12
Bit 11
Bit 10
Bit 9
Bit 08
Write:
Reset:
00000000
Address: $000F — TCNT Low
Bit 7
654321
Bit 0
Read:
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Write:
Reset:
00000000
= Unimplemented
Figure 8-10. Timer Counter Registers (TCNT)
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