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参数资料
| 型号： | MC68HC705G1FU |
| 厂商： | MOTOROLA INC |
| 元件分类： | 微控制器/微处理器 |
| 英文描述： | 8-BIT, OTPROM, 2.1 MHz, MICROCONTROLLER, PQFP64 |
| 封装： | QFP-64 |
| 文件页数： | 99/124页 |
| 文件大小： | 732K |
| 代理商： | MC68HC705G1FU |
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MOTOROLA
8-10
MC68HC05G1
SERIAL PERIPHERAL INTERFACE
8
8.4.2
Serial Peripheral Status Register (SPSR)
This is a read-only register. The status ags which generate a serial peripheral interface (SPI)
interrupt may be blocked by the SPIE control bit in the serial peripheral control register. The WCOL
bit does not cause an interrupt. The serial peripheral status register bits are dened as follows:
8.4.2.1
SPIF - Serial Peripheral Data Transfer Complete Flag
The serial peripheral data transfer ag bit noties the user that a data transfer between the device
and an external device has been completed. With the completion of the data transfer, SPIF is set,
and if SPIE is set, a serial peripheral interrupt is generated. During the clock cycle that SPIF is
being set, a copy of the received data byte in the shift register is moved to a buffer. When the data
register is read, it is the buffer that is read. During an overrun condition, when the master device
has sent several bytes of data and the slave device has not responded to the rst SPIF, only the
rst byte sent is contained in the receiver buffer and all other bytes are lost.
The transfer of data is initiated by the master device writing its serial peripheral data register.
Clearing the SPIF bit is accomplished by a software sequence of accessing the serial peripheral
status register while SPIF is set and followed by a write to or a read of the serial peripheral data
register. While SPIF is set, all writes to the serial peripheral data register are inhibited until the
serial peripheral status register is read. This occurs in the master device. In the slave device, SPIF
can be cleared (using a similar sequence) during a second transmission; however, it must be
cleared before the second SPIF in order to prevent an overrun condition. The SPIF bit is cleared
by reset.
8.4.2.2
WCOL - Write Collision Status
The function of the write collision status bit is to notify the user that an attempt was made to write
to the serial peripheral data register while a data transfer was taking place with an external device.
The transfer continues uninterrupted; therefore, a write will be unsuccessful. A “read collision” will
never occur since the received data byte is placed in a buffer in which access is always
synchronous with the MCU operation. If a “write collision” occurs, WCOL is set but no SPI interrupt
is generated. The WCOL is a status ag only.
Clearing the WCOL bit is accomplished by a software sequence of accessing the serial peripheral
status register while WCOL is set, followed by 1), a read if the serial peripheral data register prior
to the SPIF bit being set, or 2) a read or write of the serial peripheral data register after the SPIF
bit is set. A write to the serial peripheral data register (SPDR) prior to the SPIF bit being set, will
result in generation of another WCOL status ag. Both the SPIF and WCOL bits will be cleared in
Address
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
State
on Reset
$2B
SPIF
WCOL
MODF
00-0 ----
TPG
72
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相关代理商/技术参数 |
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| MC68HC705J1A | 制造商:Freescale Semiconductor 功能描述: |
| MC68HC705J1ACDW | 功能描述:IC MCU 4MHZ 1.2K OTP 20-SOIC RoHS:否 类别:集成电路 (IC) >> 嵌入式 - 微控制器， 系列:HC05 其它有关文件:STM32F101T8 View All Specifications 特色产品:STM32 32-bit Cortex MCUs 标准包装:490 系列:STM32 F1 核心处理器:ARM? Cortex?-M3 芯体尺寸:32-位 速度:36MHz 连通性:I²C，IrDA，LIN，SPI，UART/USART 外围设备:DMA，PDR，POR，PVD，PWM，温度传感器，WDT 输入/输出数:26 程序存储器容量:64KB（64K x 8） 程序存储器类型:闪存 EEPROM 大小:- RAM 容量:10K x 8 电压 - 电源 (Vcc/Vdd):2 V ~ 3.6 V 数据转换器:A/D 10x12b 振荡器型:内部 工作温度:-40°C ~ 85°C 封装/外壳:36-VFQFN，36-VFQFPN 包装:托盘 配用:497-10030-ND - STARTER KIT FOR STM32497-8853-ND - BOARD DEMO STM32 UNIV USB-UUSCIKSDKSTM32-PL-ND - KIT IAR KICKSTART STM32 CORTEXM3497-8512-ND - KIT STARTER FOR STM32F10XE MCU497-8505-ND - KIT STARTER FOR STM32F10XE MCU497-8304-ND - KIT STM32 MOTOR DRIVER BLDC497-6438-ND - BOARD EVALUTION FOR STM32 512K497-6289-ND - KIT PERFORMANCE STICK FOR STM32MCBSTM32UME-ND - BOARD EVAL MCBSTM32 + ULINK-MEMCBSTM32U-ND - BOARD EVAL MCBSTM32 + ULINK2更多... 其它名称:497-9032STM32F101T8U6-ND |
| MC68HC705J1ACP | 功能描述:IC MCU 4MHZ 1.2K OTP 20-DIP RoHS:否 类别:集成电路 (IC) >> 嵌入式 - 微控制器， 系列:HC05 其它有关文件:STM32F101T8 View All Specifications 特色产品:STM32 32-bit Cortex MCUs 标准包装:490 系列:STM32 F1 核心处理器:ARM? Cortex?-M3 芯体尺寸:32-位 速度:36MHz 连通性:I²C，IrDA，LIN，SPI，UART/USART 外围设备:DMA，PDR，POR，PVD，PWM，温度传感器，WDT 输入/输出数:26 程序存储器容量:64KB（64K x 8） 程序存储器类型:闪存 EEPROM 大小:- RAM 容量:10K x 8 电压 - 电源 (Vcc/Vdd):2 V ~ 3.6 V 数据转换器:A/D 10x12b 振荡器型:内部 工作温度:-40°C ~ 85°C 封装/外壳:36-VFQFN，36-VFQFPN 包装:托盘 配用:497-10030-ND - STARTER KIT FOR STM32497-8853-ND - BOARD DEMO STM32 UNIV USB-UUSCIKSDKSTM32-PL-ND - KIT IAR KICKSTART STM32 CORTEXM3497-8512-ND - KIT STARTER FOR STM32F10XE MCU497-8505-ND - KIT STARTER FOR STM32F10XE MCU497-8304-ND - KIT STM32 MOTOR DRIVER BLDC497-6438-ND - BOARD EVALUTION FOR STM32 512K497-6289-ND - KIT PERFORMANCE STICK FOR STM32MCBSTM32UME-ND - BOARD EVAL MCBSTM32 + ULINK-MEMCBSTM32U-ND - BOARD EVAL MCBSTM32 + ULINK2更多... 其它名称:497-9032STM32F101T8U6-ND |
| MC68HC705J1ACPE | 功能描述:8位微控制器 -MCU HCO5 CORE+1.2K RAM + EPR RoHS:否 制造商:Silicon Labs 核心:8051 处理器系列:C8051F39x 数据总线宽度:8 bit 最大时钟频率:50 MHz 程序存储器大小:16 KB 数据 RAM 大小:1 KB 片上 ADC:Yes 工作电源电压:1.8 V to 3.6 V 工作温度范围:- 40 C to + 105 C 封装 / 箱体:QFN-20 安装风格:SMD/SMT |
| MC68HC705J2CDW | 制造商:Motorola Inc 功能描述: 制造商:Motorola Inc 功能描述:MicroController, 8-Bit, 20 Pin, Plastic, SOP |
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