参数资料
型号: MC68HC705P6ADW
厂商: MOTOROLA INC
元件分类: 微控制器/微处理器
英文描述: 8-BIT, OTPROM, 2.1 MHz, MICROCONTROLLER, PDSO28
封装: SOIC-28
文件页数: 104/130页
文件大小: 1541K
代理商: MC68HC705P6ADW
Capture/Compare Timer
Timer During Wait/Halt Mode
MC68HC705P6A — Rev. 2.0
Advance Information
MOTOROLA
Capture/Compare Timer
75
8.5 Timer During Wait/Halt Mode
The CPU clock halts during the wait (or halt) mode, but the timer remains
active. If interrupts are enabled, a timer interrupt will cause the processor
to exit the wait mode.
8.6 Timer During Stop Mode
In the stop mode, the timer stops counting and holds the last count value
if STOP is exited by an interrupt. If STOP is exited by RESET, the
counters are forced to $FFFC. During STOP, if at least one valid input
capture edge occurs at the TCAP pins, the input capture detect circuit is
armed. This does not set any timer flags or wake up the MCU, but if an
interrupt is used to exit stop mode, there is an active input capture flag
and data from the first valid edge that occurred during the stop mode. If
reset is used to exit stop mode, then no input capture flag or data
remains, even if a valid input capture edge occurred.
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相关代理商/技术参数
参数描述
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