参数资料
型号: MC68HC908JL8MFAE
厂商: FREESCALE SEMICONDUCTOR INC
元件分类: 微控制器/微处理器
英文描述: 8-BIT, FLASH, 8 MHz, MICROCONTROLLER, PQFP32
封装: PLASTIC, LQFP-32
文件页数: 4/56页
文件大小: 648K
代理商: MC68HC908JL8MFAE
MC68HC908JL8SM/D
MC68HC908JL8MC68HC908JK8
FLASH Program
Operation
Programming of the FLASH memory is done on a row basis. A row consists of
32 consecutive bytes starting from addresses $XX00, $XX20, $XX40, $XX60,
$XX80, $XXA0, $XXC0, or $XXE0. Use the following step-by-step procedure
to program a row of FLASH memory.
NOTE:
Only bytes which are currently $FF may be programmed.
1.
Set the PGM bit. This configures the memory for program operation and
enables the latching of address and data for programming.
2.
Read from the FLASH block protect register ($FFCF).
3.
Write any data to any FLASH location within the address range desired.
4.
Wait for a time, tnvs (minimum 10 s).
5.
Set the HVEN bit.
6.
Wait for a time, tpgs (minimum 5 s).
7.
Write data to the FLASH address being programmed.
(The time between each FLASH address change, or the time between the last FLASH
address programmed to clearing PGM bit, must not exceed the maximum programming
time, tprog maximum.)
8.
Wait for time, tprog (minimum 30 s).
9.
Repeat step 6 and 7 until desired bytes within the row are programmed.
10.
Clear the PGM bit(1).
11.
Wait for time, tnvh (minimum 5 s).
12.
Clear the HVEN bit.
13.
After time, trcv (typical 1 s), the memory can be accessed in read mode
again.
NOTE:
Programming and erasing of FLASH locations cannot be performed by code
being executed from the FLASH memory. These operations must be performed
in the order shown, other unrelated operations may occur between the steps.
Do not exceed tprog maximum.
FLASH Block
Protect Register
The FLASH block protect register is implemented as a byte within the FLASH
memory, and therefore it is programmed using a FLASH memory byte-
programming operation. The value in this register determines the starting
address of the protected range within the FLASH memory. The FLASH is
protected from this address to the end of FLASH memory at $FFFF.
BPR[7:0] — FLASH Protection Register Bits [7:0]
$FFCF
Bit 7
654321
Bit 0
BPR7
BPR6
BPR5
BPR4
BPR3
BPR2
BPR1
BPR0
Reset:
Unaffected by reset. Initial value from factory is all 1’s.
Figure 6. FLASH Block Protect Register (FLBPR)
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Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
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