参数资料
型号: MCP1725T-1802E/MC
厂商: Microchip Technology
文件页数: 22/32页
文件大小: 0K
描述: IC REG LDO 1.8V .5A 8DFN
产品培训模块: High Current LDOs
标准包装: 3,300
稳压器拓扑结构: 正,固定式
输出电压: 1.8V
输入电压: 2.3 V ~ 6 V
电压 - 压降(标准): 0.21V @ 500mA
稳压器数量: 1
电流 - 输出: 500mA(最小)
工作温度: -40°C ~ 125°C
安装类型: 表面贴装
封装/外壳: 8-VFDFN 裸露焊盘
供应商设备封装: 8-DFN(2x3)
包装: 带卷 (TR)
MCP1725
C = I ? -------
5.3.2 JUNCTION TEMPERATURE
ESTIMATE
To estimate the internal junction temperature, the
calculated temperature rise is added to the ambient or
offset temperature. For this example, the worst-case
5.4
Where:
C DELAY Calculations (typical)
Δ T
Δ V
junction temperature is estimated below:
T J = T JRISE + T A(MAX)
T J = 38.8°C + 60.0°C
T J = 98.8°C
As you can see from the result, this application will be
C
I
Δ T
Δ V
=
=
=
=
C DELAY Capacitor
C DELAY charging current,
140 nA typical.
time delay
C DELAY threshold voltage, 0.42V
typical
C = I ? ------- = ---------------------------------- = 333.3 × 10
operating near around a junction temperature of
100°C. The PCB layout for this application is very
important as it has a significant impact on the junction-
to-ambient thermal resistance (R θ JA ) of the 2x3 DFN
package, which is very important in this application.
Δ T ( 140nA ? Δ T ) – 09
Δ V 0.42V
For a delay of 300ms,
C = 333.3E-09 *.300
? Δ T
5.3.3
MAXIMUM PACKAGE POWER
C = 100E-09 μF (0.1 μF)
DISSIPATION AT 60°C AMBIENT
TEMPERATURE
2x3 DFN (76°C/W R θ JA ):
P D(MAX)
P D(MAX)
=
=
(125°C – 60°C) / 76°C/W
0.855W
SOIC8 (163°C/Watt R θ JA ):
P D(MAX)
P D(MAX)
=
=
(125°C – 60°C)/ 163°C/W
0.399W
From this table, you can see the difference in maximum
allowable power dissipation between the 2x3 DFN
package and the 8-pin SOIC package. This difference
is due to the exposed metal tab on the bottom of the
DFN package. The exposed tab of the DFN package
provides a very good thermal path from the die of the
LDO to the PCB. The PCB then acts like a heatsink,
providing more area to distribute the heat generated by
the LDO.
DS22026B-page 22
? 2007 Microchip Technology Inc.
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