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| 型号： | MCP2140A-I/SS |
| 厂商： | Microchip Technology |
| 文件页数： | 66/66页 |
| 文件大小： | 0K |
| 描述： | IC IRDA CONTROLLR DTE/DCE 20SSOP |
| 标准包装： | 67 |
| 控制器类型： | IRDA 标准协议栈控制器 |
| 接口： | UART |
| 电源电压： | 3 V ~ 5.5 V |
| 电流 - 电源： | 2.2mA |
| 工作温度： | -40°C ~ 125°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 20-SSOP（0.209"，5.30mm 宽） |
| 供应商设备封装： | 20-SSOP |
| 包装： | 管件 |
| 产品目录页面： | 685 (CN2011-ZH PDF) |
| 配用： | MCP2140DM-TMPSNS-ND - BOARD DEMO FOR MCP2140 |
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2007-2011 Microchip Technology Inc.
DS22050B-page 9
MCP2140A
2.4
Host UART Interface
The host UART interface communicates with the host
controller. This interface has eight signals associated
with it: TX, RX, RTS, CTS, DSR, DTR, CD and RI. Sev-
eral of these signals are locally generated (not passed
over the IR interface). The host UART is a full-duplex
interface, meaning that the system can transmit and
receive simultaneously.
2.4.1
BAUD RATE
The baud rate for the MCP2140A serial port (the TX
and RX pins) is fixed at 9600 baud when the device
frequency is 3.6864 MHz.
2.4.2
TRANSMITTING
When the host controller sends serial data to the
MCP2140A, the host controller’s baud rate is required
to match the baud rate of the MCP2140A’s serial port.
2.4.3
RECEIVING
When the host controller receives serial data from the
MCP2140A, the host controller’s baud rate is required
to match the baud rate of the MCP2140A’s serial port.
2.4.4
HARDWARE HANDSHAKING
There are three host UART signals used to control the
handshaking operation between the host controller and
the MCP2140A.
The following signals are host UART signals:
DSR
RTS
CTS
2.4.4.1
DSR
The DSR signal indicates that the MCP2140A has
established a link between the MCP2140A and the pri-
mary device. Please refer to Appendix B: “How
Devices Connect” for more information.
2.4.4.2
RTS
The RTS signal indicates to the MCP2140A that the
host controller is ready to receive serial data.
Once an IR packet with “data” has been received by the
MCP2140A, the RTS signal will need to be low for the
received data to be transferred to the host controller. If
the RTS signal remains high, an IR link timeout will
occur and the MCP2140A will disconnect from the pri-
mary device.
2.4.4.3
CTS
The CTS signal indicates that the MCP2140A UART
receive buffer is full. The MCP2140A generates the
CTS signal locally.
The MCP2140A UART receive buffer is 60 bytes and
the CTS signal will be driven high once 59 bytes have
been received.
After the MCP2140A UART has received a byte, there
is a latency before the CTS signal is driven high, if the
UART receive buffer has 59 bytes. The MCP2140A
then supports the reception of another byte (the 60th
byte). This allows a byte was being received when CTS
was driven high not to be lost. The MCP2140A UART
receive buffer supports 60 bytes, regardless if the last
byte started transmission before or after the CTS signal
was driven high.
The MCP2140A has a buffer for incoming data from the
IR host. This buffer supports the 60-byte data payload
plus the memory overhead of the packet. Another
60 byte buffer is provided to buffer data from the UART
serial port. The MCP2140A can handle IR data and
host UART serial port data simultaneously. A hardware
handshaking pin (CTS) is provided to inhibit the host
controller from sending serial data when the host UART
buffer is not available. Figure 2-3 shows CTS states
while Figure 2-4 shows an example of the CTS signal
when the host controller streams 250 bytes to the
MCP2140A. Figure 2-5 shows a flow chart for host
UART flow control using the CTS signal.
Note 1: The MCP2140A generates several non-
data signals locally.
2: The MCP2140A emulates a 3-wire serial
connection (TXD, RXD and GND). The
transceiver’s transmit data (TXD), receive
data (RXD) signals, and the state of the
CD. RI and DTR input pins are carried
back and forth to the primary device.
3: The RTS and CTS signals are local
emulations.
Note:
When the CTS output signal goes high, the
UART FIFO will store up to 1 additional
byte, for a maximum of 60 bytes.
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