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| 型号： | MCP4725A1T-E/CH |
| 厂商： | Microchip Technology |
| 文件页数： | 8/50页 |
| 文件大小： | 0K |
| 描述： | IC DAC 12BIT EE W/I2C SOT23-6 |
| 标准包装： | 1 |
| 设置时间： | 6µs |
| 位数： | 12 |
| 数据接口： | EEPROM，I²C，串行 |
| 转换器数目： | 1 |
| 电压电源： | 单电源 |
| 工作温度： | -40°C ~ 125°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | SOT-23-6 |
| 供应商设备封装： | SOT-23-6 |
| 包装： | 标准包装 |
| 输出数目和类型： | 1 电压，单极；1 电压，双极 |
| 采样率（每秒）： | * |
| 产品目录页面： | 673 (CN2011-ZH PDF) |
| 配用： | MCP4725DM-PTPLS-ND - BOARD DAUGHTER PICTAIL MCP4725 |
| 其它名称： | MCP4725A1T-E/CHDKR |
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MCP4725
DS22039D-page 16
2009 Microchip Technology Inc.
FIGURE 4-2:
DNL Accuracy.
4.5
Offset Error
Offset error (Figure 4-3) is the deviation from zero volt-
age output when the digital input code is zero. This
error affects all codes by the same amount. In the
MCP4725, the offset error is not trimmed at the factory.
However, it can be calibrated by software in application
circuits.
FIGURE 4-3:
Offset Error.
4.6
Gain Error
Gain error (see Figure 4-4) is the difference between
the actual full scale output voltage from the ideal output
voltage on the transfer curve. The gain error is
calculated after nullifying the offset error, or full scale
error minus the offset error.
The gain error indicates how well the slope of the actual
transfer function matches the slope of the ideal transfer
function. The gain error is usually expressed as percent
of full scale range (% of FSR) or in LSB.
In the MCP4725, the gain error is not calibrated at the
factory and most of the gain error is contributed by the
output op amp saturation near the code range beyond
4000. For the applications which need the gain error
specification less than 1% maximum, the user may
consider using the DAC code range between 100 and
4000 instead of using full code range (code 0 to 4095).
The DAC output of the code range between 100 and
4000 is much linear than full scale range (0 to 4095).
The gain error can be calibrated by software in
applications.
4.7
Full Scale Error (FSE)
Full scale error (Figure 4-4) is the sum of offset error
plus gain error. It is the difference between the ideal
and measured DAC output voltage with all bits set to
one (DAC input code = FFFh).
EQUATION 4-4:
FIGURE 4-4:
Gain Error and Full Scale
Error.
4.8
Gain Error Drift
Gain error drift is the variation in gain error due to a
change in ambient temperature. The gain error drift is
typically expressed in ppm/oC.
010
001
000
Analog
Output
(LSB)
DAC Input Code
011
111
100 101
1
2
3
4
5
6
0
7
DNL = 2LSB
DNL = 0.5 LSB
110
Ideal Transfer Function
Actual Transfer Function
Analog
Output
Ideal Transfer Function
Actual Transfer Function
DAC Input Code
0
Offset
Error
FSE
V
OUT
V
Ideal
–
()
LSB
---------------------------------------
=
Where:
VIdeal
=(VREF) (1 - 2-n) - VOFFSET
VREF
=
The reference voltage.
VREF = VDD in the MCP4725
Analog
Output
Actual Transfer Function
DAC Input Code
0
Gain Error
Ideal Transfer Function
after Offset Error Removed
Full Scale
Error
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