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| 型号： | MCP6566RT-E/OT |
| 厂商： | Microchip Technology |
| 文件页数： | 6/30页 |
| 文件大小： | 0K |
| 描述： | IC COMPARATOR O-D 1.8V SOT23-5 |
| 产品培训模块： | MCP656x |
| 标准包装： | 1 |
| 类型： | 通用 |
| 元件数： | 1 |
| 输出类型： | CMOS，开路漏极 |
| 电压 - 电源，单路/双路(±)： | 1.8 V ~ 5.5 V |
| 电压 - 输入偏移（最小值）： | 10mV @ 5.5V |
| 电流 - 输入偏压（最小值）： | 1pA @ 5.5V |
| 电流 - 输出（标准）： | 50mA |
| 电流 - 静态（最大值）： | 130µA |
| CMRR, PSRR（标准）： | 66dB CMRR，70dB PSRR |
| 传输延迟（最大）： | 80ns |
| 磁滞： | 5mV |
| 工作温度： | -40°C ~ 125°C |
| 封装/外壳： | SC-74A，SOT-753 |
| 安装类型： | 表面贴装 |
| 包装： | 标准包装 |
| 产品目录页面： | 681 (CN2011-ZH PDF) |
| 其它名称： | MCP6566RT-E/OTDKR |
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22
DS580F6
CS8406
8.7
Interrupt 1 Status (07h) (Read Only)
For all bits in this register, a ‘1’ means the associated interrupt condition has occurred at least once since
the register was last read. A ‘0’ me ans the associated interrupt condition has NOT occurred since the last
reading of the register. Reading the register resets all bits to ‘0’, unless the Interrupt Mode is set to level and
the interrupt source is still true. Status bits that are masked off in the associated mask register will always
be ‘0’ in this register. This register defaults to 00h.
TSLIP - AES3 transmitter source data slip interrupt
In data flows where OMCK, which clocks the AES3 transmitter, is asynchronous to the data source, this bit
will go high every time a data sample is dropped or repeated. When TCBL is an input, this bit will go high
on receipt of a new TCBL signal.
EFTC - E to F C-buffer transfer interrupt. The source for this bit is true during the E to F buffer transfer in
the C bit buffer management process.
8.8
Interrupt 2 Status (08h) (Read Only)
For all bits in this register, a ‘1’ means the associated interrupt condition has occurred at least once since
the register was last read. A ‘0’ me ans the associated interrupt condition has NOT occurred since the last
reading of the register. Reading the register resets all bits to ‘0’, unless the Interrupt Mode is set to level and
the interrupt source is still true. Status bits that are masked off in the associated mask register will always
be ‘0’ in this register. This register defaults to 00h.
EFTU - E to F U-buffer transfer interrupt. (Block Mode only) The source of this bit is true during the E to F
buffer transfer in the U bit buffer management process.
8.9
Interrupt 1 Mask (09h)
The bits of this register serve as a mask for the Interrupt 1 register. If a mask bit is set to 1, the error is un-
masked, meaning that its occurrence will affect the INT pin and the status register. If a mask bit is set to 0,
the error is mas ked, meaning that its occurrence will not affect the INT pin or the status register. The bit
positions align with the corresponding bits in Interrupt 1 register. This register defaults to 00h.
7
6
5
432
1
0
TSLIP
0
EFTC
0
7
6
5
432
1
0
00
0
EFTU
0
7
6
5
432
1
0
TSLIPM
0
EFTCM
0
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| MCP6566T-E/LT | 功能描述:校验器 IC Singl 1.8V Opn Drain Comparator, E temp RoHS:否 制造商:STMicroelectronics 产品: 比较器类型: 通道数量: 输出类型:Push-Pull 电源电压-最大:5.5 V 电源电压-最小:1.1 V 补偿电压（最大值）:6 mV 电源电流（最大值）:1350 nA 响应时间: 最大工作温度:+ 125 C 安装风格:SMD/SMT 封装 / 箱体:SC-70-5 封装:Reel |
| MCP6566T-E/MC | 功能描述:校验器 IC SNGL 16V Open Drain Comparator E temp RoHS:否 制造商:STMicroelectronics 产品: 比较器类型: 通道数量: 输出类型:Push-Pull 电源电压-最大:5.5 V 电源电压-最小:1.1 V 补偿电压（最大值）:6 mV 电源电流（最大值）:1350 nA 响应时间: 最大工作温度:+ 125 C 安装风格:SMD/SMT 封装 / 箱体:SC-70-5 封装:Reel |
| MCP6566T-E/MS | 功能描述:校验器 IC SNGL 16V Open Drain Comparator E temp RoHS:否 制造商:STMicroelectronics 产品: 比较器类型: 通道数量: 输出类型:Push-Pull 电源电压-最大:5.5 V 电源电压-最小:1.1 V 补偿电压（最大值）:6 mV 电源电流（最大值）:1350 nA 响应时间: 最大工作温度:+ 125 C 安装风格:SMD/SMT 封装 / 箱体:SC-70-5 封装:Reel |
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