参数资料
型号: MCZ33291LEG
厂商: Freescale Semiconductor
文件页数: 15/26页
文件大小: 0K
描述: IC SWITCH 8X LOSIDE W/SPI 24SOIC
标准包装: 30
类型: 低端
输入类型: SPI
输出数: 8
导通状态电阻: 1.1 欧姆
电流 - 输出 / 通道: 500mA
电流 - 峰值输出: 3A
电源电压: 9 V ~ 26.5 V
工作温度: -40°C ~ 125°C
安装类型: 表面贴装
封装/外壳: 24-SOIC(0.295",7.50mm 宽)
供应商设备封装: 24-SOIC W
包装: 管件
FUNCTIONAL DESCRIPTION
POWER CONSUMPTION
The 33291L has extremely low power consumption in both
the operating and standby modes. In the standby, or Sleep,
mode, with V DD ≤ 2.0 V, the current consumed by the VPWR
pin is less than 25 μ A. In the operating mode, the current
drawn by the VDD pin is less than 4.0 mA (1.0 mA typical)
while the current drawn at the VPWR pin is 2.0 mA maximum
(1.0 mA typical). During normal operation, turning outputs
ON increases I PWR by only 20 μ A per output. Each output
experiencing a soft short (over-current conditions just under
the current limit) adds 0.5 mA to the I PWR current
PARALLELING OF OUTPUTS
Using MOSFETs as output switches permits connecting
any combination of outputs together. R DS(ON) of MOSFETs
have an inherent positive temperature coefficient providing
balanced current sharing between outputs without
destructive operation (bipolar outputs could not be paralleled
in this fashion as thermal run-away would likely occur). The
device can even be operated with all outputs tied together.
This mode of operation may be desirable in the event the
application requires lower power dissipation or the added
capability of switching higher currents.
Performance of parallel operation results in a
corresponding decrease in R DS(ON) while the Output OFF
Open Load Detect Currents and the Output Current Limits
increase correspondingly (by a factor of eight if all outputs are
paralleled). Less than 125 m Ω R DS(ON) at 25 ° C with current
limiting of 8 A to 24 A will result if all outputs are paralleled
together. There will be no change in the over-voltage detect
or the OFF output threshold voltage range. The advantage of
paralleling outputs within the same 33291L affords the
existence of minimal R DS(ON) and output clamp voltage
variation between outputs.
Typically, the variation of R DS(ON) between outputs of the
same device is less than 0.5 percent. The variation in clamp
voltages, potentially affecting dynamic current sharing, is less
than five percent. Paralleling outputs from two or more
different devices is possible, but it is not recommended.
There is no guarantee the R DS(ON) and clamp voltage of the
two devices will match. System level thermal design analysis
and verification should be conducted whenever paralleling
outputs, particularly where different devices are involved.
33291L
Analog Integrated Circuit Device Data
Freescale Semiconductor
15
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