参数资料
型号: MCZ33889BEGR2
厂商: Freescale Semiconductor
文件页数: 18/59页
文件大小: 0K
描述: IC SYSTEM BASIS W/CAN 28-SOIC
标准包装: 1,000
系列: *
应用: *
接口: *
电源电压: *
封装/外壳: 28-SOIC(0.295",7.50mm 宽)
供应商设备封装: 28-SOIC W
包装: 带卷 (TR)
安装类型: 表面贴装
Analog Integrated Circuit Device Data
Freescale Semiconductor
25
33889
FUNCTIONAL DESCRIPTION
FUNCTIONAL INTERNAL BLOCK DESCRIPTION
VOLTAGE REGULATOR TWO (V2)
The V2 pin is the input sense for the V2 regulator. It is connected to the external series pass transistor. V2 is also the 5.0 V
supply of the internal CAN interface. It is possible to connect V2 to an external 5.0 V regulator or to the VDD output when no
external series pass transistor is used. In this case, the V2CTRL pin must be left open.
RTH (RTH)
Pin for the connection of the bus termination resistor to CANH
RTL (RTL)
Pin for the connection of the bus termination resistor to CANL
CAN HIGH AND CAN LOW OUTPUTS
(CANH AND CANL)
The CAN High and CAN Low pins are the interfaces to the CAN bus lines. They are controlled by TXD input level, and the
state of CANH and CANL is reported through RXD output.
SYSTEM CLOCK (SCLK)
SCLK is the Serial Data Clock input pin of the serial peripheral interface.
MASTER IN/SLAVE OUT (MISO
MISO is the Master In Slave Out pin of the serial peripheral interface. Data is sent from the SBC to the microcontroller through
the MISO pin.
MASTER OUT/SLAVE IN (MOSI)
MOSI is the Master Out Slave In pin of the serial peripheral interface. Control data from a microcontroller is received through
this pin.
CHIP SELECT (CS)
CS is the Chip Select pin of the serial peripheral interface. When this pin is LOW, the SPI port of the device is selected.
WATCH DOG (WDOG)
The Watchdog output pin is asserted LOW to flag that the software watchdog has not been properly triggered.
FUNCTIONAL INTERNAL BLOCK DESCRIPTION
DEVICE SUPPLY
The device is supplied from the battery line through the VSUP pin. An external diode is required to protect against negative
transients and reverse battery. It can operate from 4.5 V and under the jump start condition at 27 V DC. This pin sustains standard
automotive voltage conditions such as load dump at 40 V. When VSUP falls below 3.0 V typical, the MC33889 detects it and
stores the information in the SPI register, in a bit called “BATFAIL”. This detection is available in all operation modes.
VDD1 VOLTAGE REGULATOR
VDD1 Regulator is a 5.0 V output voltage with total current capability of 200 mA. It includes a voltage monitoring circuitry
associated with a reset function. The VDD1 regulator is fully protected against overcurrent, short-circuit and has overtemperature
detection warning flags and shutdown with hysteresis.
V2 REGULATOR
V2 Regulator circuitry is designed to drive an external path transistor in order to increase output current flexibility. Two pins
are used: V2 and V2CTRL. Output voltage is 5.0 V and is realized by a tracking function of the VDD1 regulator. A recommended
ballast transistor is the MJD32C. Other transistors might be used, however depending upon the PNP gain, an external resistor
capacitor network might be connected between the emitter and base of the PNP. The use of external ballast is optional (refer to
simplified typical application). The state of V2 is reported into the IOR register (if V2 is below 4.5 V typical, or in cases of overload
or short-circuit).
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