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参数资料
| 型号： | MCZ33889BEGR2 |
| 厂商： | Freescale Semiconductor |
| 文件页数： | 21/59页 |
| 文件大小： | 0K |
| 描述： | IC SYSTEM BASIS W/CAN 28-SOIC |
| 标准包装： | 1,000 |
| 系列： | * |
| 应用： | * |
| 接口： | * |
| 电源电压： | * |
| 封装/外壳： | 28-SOIC（0.295"，7.50mm 宽） |
| 供应商设备封装： | 28-SOIC W |
| 包装： | 带卷 (TR) |
| 安装类型： | 表面贴装 |
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Analog Integrated Circuit Device Data
28
Freescale Semiconductor
33889
FUNCTIONAL DEVICE OPERATION
OPERATIONAL MODES
SOFTWARE WATCHDOG IN STOP MODE
If the watchdog is enabled (register MCR, bit WDSTOP set), the MCU has to wake-up independently of the SBC before the
end of the SBC watchdog time. In order to do this, the MCU has to signal the wake-up to the SBC through the SPI wake-up (CS
pin low to high transition to activated the SPI wake-up). Then the SBC wakes up and jumps into the normal request mode. The
MCU has to configure the SBC to go to either into normal or standby mode. The MCU can then choose to go back into stop mode.
If no MCU wake-up occurs within the watchdog timing, the SBC will activate the reset pin and jump into the normal request
mode. The MCU can then be initialized.
NORMAL REQUEST MODE
This is a temporary mode automatically accessed by the device after a wake-up event from sleep or stop mode, or after device
power up. In this mode, the VDD1 regulator is ON, V2 is off, and the reset pin is high. As soon as the device enters the normal
request mode, an internal 350 ms timer is started. During these 350 ms, the microcontroller of the application must address the
SBC via the SPI and configure the watchdog register (TIM1 register). This is the condition for the SBC to leave the Normal request
Mode and enter the Normal mode, and to set the watchdog timer according to the configuration done during the Normal Request
mode.
The “BATFAIL flag” is a bit which is triggered when VSUP falls below 3.0 V. This bit is set into the MCR register. It is reset by
the MCR register read.
INTERNAL CLOCK
This device has an internal clock used to generate all timings (reset, watchdog, cyclic wake-up, filtering time etc...).
RESET PIN
A reset output is available in order to reset the microcontroller. Reset causes are:
VDD1 falling out of range: if VDD1 falls below the reset threshold (parameter RST-TH), the reset pin is pulled low until VDD1 returns
to the nominal voltage.
Power on reset: at device power on or at device wake-up from sleep mode, the reset is maintained low until VDD1 is within its
operation range.
Watchdog timeout: if the watchdog is not cleared, the SBC will pull the reset pin low for the duration of the reset duration time
(parameter: RESET-DUR).
For debug purposes at 25 °C, the reset pin can be shorted to 5.0 V.
SOFTWARE WATCHDOG (SELECTABLE WINDOW OR TIMEOUT WATCHDOG)
The software watchdog is used in the SBC normal and stand-by modes for monitoring the MCU. The watchdog can be either
a window or timeout. This is selectable by the SPI (register TIM, bit WDW). Default is the window watchdog. The period of the
watchdog is selectable by the SPI from 5.0 to 350 ms (register TIM, bits WDT0 and WDT1). When the window watchdog is
selected, the closed window is the first half of the selected period, and the open window is the second half of the period. The
watchdog can only be cleared within the open window time. An attempt to clear the watchdog in the closed window will generate
a reset. The Watchdog is cleared through the SPI by addressing the TIM register.
Refer to ”table for reset pin operations” operation in mode 2.
WAKE-UP CAPABILITIES
Several wake-up capabilities are available for the device when it is in sleep or stop mode. When a wake-up has occurred, the
wake-up event is stored into the WUR or CAN registers. The MCU can then access the wake-up source. The wake-up options
are selectable through the SPI while the device is in normal or standby mode, and prior to entering low power mode (Sleep or
Stop mode).
WAKE-UP FROM WAKE-UP INPUTS (L0, L1) WITHOUT CYCLIC SENSE
The wake-up lines are dedicated to sense external switch states, and when changes occur to wake-up the MCU (In sleep or
stop modes). The wake-up pins are able to handle 40 V DC. The internal threshold is 3.0 V typical, and these inputs can be used
as an input port expander. The wake-up inputs state can be read through the SPI (register WUR). L0 has a lower threshold than
L1 in order to allow a connection and wake-up from a digital output such as a CAN physical interface.
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相关代理商/技术参数 |
参数描述 |
|---|---|
| MCZ33889DEG | 功能描述:网络控制器与处理器 IC SBC-LITE-LS-CAN RoHS:否 制造商:Micrel 产品:Controller Area Network (CAN) 收发器数量: 数据速率: 电源电流（最大值）:595 mA 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:PBGA-400 封装:Tray |
| MCZ33889DEG | 制造商:Freescale Semiconductor 功能描述:IC SYSTEM BASIS W/CAN TRANCEIVER |
| MCZ33889DEG/R2 | 制造商:FREESCALE 制造商全称:Freescale Semiconductor, Inc 功能描述:System Basis Chip with Low Speed Fault Tolerant CAN Interface |
| MCZ33889DEGR2 | 功能描述:网络控制器与处理器 IC SBC-LITE-LS-CAN RoHS:否 制造商:Micrel 产品:Controller Area Network (CAN) 收发器数量: 数据速率: 电源电流（最大值）:595 mA 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:PBGA-400 封装:Tray |
| MCZ33897AEF | 功能描述:网络控制器与处理器 IC SWCAN RoHS:否 制造商:Micrel 产品:Controller Area Network (CAN) 收发器数量: 数据速率: 电源电流（最大值）:595 mA 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:PBGA-400 封装:Tray |
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