参数资料
型号: MIC2131-4YTSE
厂商: Micrel Inc
文件页数: 11/20页
文件大小: 0K
描述: IC REG CTRLR BUCK PWM VM 16TSSOP
标准包装: 94
PWM 型: 电压模式
输出数: 1
频率 - 最大: 440kHz
占空比: 80%
电源电压: 8 V ~ 40 V
降压:
升压:
回扫:
反相:
倍增器:
除法器:
Cuk:
隔离:
工作温度: -40°C ~ 125°C
封装/外壳: 16-TSSOP(0.173",4.40mm)裸露焊盘
包装: 管件
产品目录页面: 1091 (CN2011-ZH PDF)
其它名称: 576-3099-5
Micrel, Inc.
be disabled during an over current condition.
Under Voltage
A ±6% comparator monitors the output voltage and will
initiate the fast hysteretic control loop (FHyCL) to
regulate the output. A comparator monitors the output
voltage and sets PGOOD true when the output reaches
90% of the regulated output.
Over Voltage
If the voltage at the FB pin is detected to be 15% higher
than nominal for >2μs, then the controller is stopped
from switching immediately and latched off. Switching
can be re-started by taking EN below the channel’s
enable threshold and re-enabling or re-cycling power to
the IC.
Figure 5.
During the normal operation of a synchronous Buck
regulator, as the lower MOSFET is switched on, its drain
MIC2130/1
The larger the inductor current, the more negative V DS
becomes. This is utilized for the detection of over current
by passing a known fixed current source (200μA)
through a resistor R CS which sets up an offset voltage
such that when 200μA x R CS = I DRAIN x RDS ON the
MIC2130/31’s over current trigger is set. This disables
the next high side gate drive pulse. After missing the
high side pulse, the over current (OC) trigger is reset. If
on the next low side drive cycle, the current is still too
high i.e., V CS is ≤ 0V, another high side pulse is missed
and so on. Thus reducing the overall energy transferred
to the output and V OUT starts to fall. As this successive
missing of pulses results in an effectively lower switching
frequency, power inductor ripple currents can get very
high if left unlimited. The MIC2130/31 therefore limits
Duty Cycle during current limit to prevent currents
building up in the power inductor and output capacitors.
Current Limit Setting
The Simple Method
R CS = I OUT x RDS ON(max) /200μA.
Accurate Method
For designs where ripple current is significant when
compared to I OUT, or for low duty cycle operation,
calculating the current setting resistor R CS should take
into account that one is sensing the peak inductor
current and that there is a blanking delay of
approximately 100ns.
voltage will become negative with respect to ground as
the inductor current continues to flow from Source-to-
Drain. This negative voltage is proportional to output
load current, inductor ripple current and MOSFET
RDS ON .
Figure 7.
I PK = I OUT +
I RIPPLE
2
I RIPPLE =
V OUT ? (1 ? D )
F SWITCH ? L
I SET = I PK ?
V OUT ? T DLY
L
Figure 6.
R CS =
I SET ? RDS ON (max)
I CS (min)
D = Duty Cycle
F SWITCH = Switching Frequency
April 2008
11
M9999-042108-C
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