参数资料
型号: MIC2131-4YTSE
厂商: Micrel Inc
文件页数: 15/20页
文件大小: 0K
描述: IC REG CTRLR BUCK PWM VM 16TSSOP
标准包装: 94
PWM 型: 电压模式
输出数: 1
频率 - 最大: 440kHz
占空比: 80%
电源电压: 8 V ~ 40 V
降压:
升压:
回扫:
反相:
倍增器:
除法器:
Cuk:
隔离:
工作温度: -40°C ~ 125°C
封装/外壳: 16-TSSOP(0.173",4.40mm)裸露焊盘
包装: 管件
产品目录页面: 1091 (CN2011-ZH PDF)
其它名称: 576-3099-5
Micrel, Inc.
and fall times). Whereas the low-side MOSFET can
switch slower, but must handle larger RMS currents.
When duty cycle approaches 50%, the current carrying
capability of the upper MOSFET starts to become critical
also and can sometimes require external high current
drivers to achieve the necessary switching speeds.
MOSFET loss = Static loss + Transition loss
Static loss (Ps) = I FETRMS2 x RDS ON
Transition loss (Pt) = I OUT x (tr+tf) x V DSOFF x F SWITCH /2
tr + tf = Rise time + Fall time
Due to the worst case driver currents of the MIC2130/31,
the value of tr + tf simplifies to:
tr + tf (ns) = ? Qg (nC)
? Qg can be found in the MOSFET characteristic curves
V DSOFF = Voltage across MOSFET when it is off
MIC2130/1
dissipation of 1.2W per MOSFET package. This can be
altered if the final design has higher allowable package
dissipation.
Look at lower MOSFET first:
Pdis_max = 1.2 W = Ps + Pt
For the low side FET, Pt is small because VDS OFF is
clamped to the forward voltage drop of the Schottky
diode. Therefore:
RDS ON(max) ~ 1.2/I FETRMS2
Example: For 12V to 1.8V @ 10A
RDS ON(max) < 14m ?
It is important to remember to use the RDS ON(max) figure
for the MOSFET at the maximum temperature to help
prevent thermal runaway (as the temperature increases,
the RDS ON increases).
? Qg (max) should be limited so that the low side MOSFET
is off within the fixed 80ns delay before the high side
driver turns on.
High side MOSFET:
For the high side FET, the losses should ideally be
evenly spread between transition and static losses. Use
the C of the V IN range to balance the losses.
Pt = Pdis_max/2 = 0.6 = I OUT x ? Qg x V INMID x F SWITCH /2
? Qg (max) < 0.6 x 2 / (I OUT x V INMID x F SWITCH )
RDSon is calculated similarly for the high side MOSFET:
RDS ON(max) ~ 0.6 / I FETRMS2
( I X + I X ? I Y + I Y )
I FETRMS =
D ?
2 2
3
Using previous example:
? Qg (max) < 20nC
I X = I OUT – I RIPPLE /2
I Y = I OUT + I RIPPLE /2
D_on = T ON x F SWITCH high-side FET on time
D_off = T ON x F SWITCH low-side FET on time
D_on = D = V O /(V IN x eff) since it changes depending on
which MOSFET we are calculating losses for.
High-side FET T ON = D_on/F SWITCH
The lower MOSFET is not on for the whole time that the
upper MOSFET is off due to the fixed 80ns high side
driver delay. Therefore, there is an 80ns term subtracted
from the lower FET on time equation.
Low-side FET T ON = (1-D_on)/F SWITCH – 80ns
There are many MOSFET packages available which
have varying values of thermal resistance and can
therefore dissipate more power if there is sufficient
airflow or heat sink externally to remove the heat.
However, for this exercise we can assume a maximum
RDS ON(max) < 35m ?
Note that these are maximum values based upon
thermal limits and are not targeted at the highest
efficiency. Selection of lower values is recommended to
achieve higher efficiency designs.
Limits to watch out for:
Qg TOTAL < 1500 nC/V IN
Total of both high side and low side MOSFET Qg value
at VGS = 5V for both channels.
Example: @ V IN(max) = 13.2V,
Qg TOTAL < 1500/13.2 = 114nC
? Qg LOW < 120nC
Maximum turn on gate charge for the low side MOSFET
to ensure proper turn off before high side MOSFET is
switched on.
April 2008
15
M9999-042108-C
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