参数资料
| 型号： | MIC5167YML TR |
| 厂商： | Micrel Inc |
| 文件页数： | 11/23页 |
| 文件大小： | 0K |
| 描述： | IC REG SYNC BUCK 6A 1MHZ 24-MLF |
| 标准包装： | 1 |
| 应用： | 转换器，DDR，QDR |
| 输入电压： | 2.6 V ~ 5.5 V |
| 输出数： | 1 |
| 输出电压： | 最低可调至 0.6V |
| 工作温度： | -40°C ~ 125°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 24-VFQFN 裸露焊盘，24-MLF? |
| 供应商设备封装： | 24-MLF?（4x4） |
| 包装： | 标准包装 |
| 其它名称： | 576-3793-6 |
Micrel, Inc.
Application Information
DDR memory requires two power supplies, one for the
memory chip, referred to as VDDQ and the other for a
termination supply V TT , which is one-half VDDQ. With
memory speeds in excess of 300MHz, the memory
system bus must be treated as transmission lines. To
maintain good signal integrity the memory bus must be
terminated to minimize signal reflections. Figure 2 shows
the simplified termination circuit. Each control, address
and data lines have these termination resistors RS and
RT connected to them.
MIC5167
Since the voltage across the resistance is VDDQ/2, the
power dissipated is one-quarter the power of a
termination voltage of VDDQ. The memory bits are not
usually all at a logic high or logic low at the same time so
the V TT supply is usually not sinking or sourcing much
current.
V TT
V TT is regulated to V REF . Due to high speed signaling, the
load current seen by V TT is constantly changing. To
maintain adequate transient response, large OS-CON
and ceramics are recommended on V TT . The proper
combination and placement of the OS-CON and ceramic
V DDQ
1.8V
CHIP SET
VDDQ
RS
RT
+
VDDQ
DDR
MEMORY
-
+
capacitors is important to reduce both ESR and ESL
such that high-current and high-speed transients do not
exceed the dynamic voltage tolerance requirement of
V TT . The larger OS-CON capacitors provide bulk charge
storage while the smaller ceramic capacitors provide
current during the fast edges of the bus transition. Using
several smaller ceramic capacitors distributed near the
VDDQ
termination resistors is important to reduce the effects of
PCB trace inductance.
RS
RT
VREF
-
+
When V TT is sinking current, the external power supply
that powers the MIC5167 (PV IN ) must be able to sink
current-to-ground; otherwise, the supply voltage will start
to increase. It is crucial that this external power supply
MIC5167
must also be able to source and sink current.
V IN
5.0V
22μF
x4
VDDQ
PVIN
SVIN
PGND
FB
SW
EP
SGND
VREF
0.4μH
100pF
V TT /0.9V
100μF
x3
VDDQ
The VDDQ input on the MIC5167 is used to create the
internal reference voltage for V TT . The reference voltage
is generated from an internal resistor divider network of
two 60k ? resistors, generating a reference voltage V REF
that is V DDQ /2. The VDDQ input should be Kelvin
connected as close as possible to the memory supply
Figure 2. DDR Memory Termination Circuit
Bus termination provides a means to increase signaling
speed while maintaining good signal integrity. The
termination network consists of a series resistor (RS)
and a terminating resistor (RT). Values of R S range
between 10 ? to 30 ? with a typical of 22 ? , while R T
ranges from 22 ? to 28 ? with a typical value of 25 ? . V TT
will dynamically sink and source current to maintain a
termination voltage under all conditions. This method of
bus termination reduces common mode noise, settling
time, voltage swings, EMI/RFI and improves slew rates.
V DDQ powers all the memory IC’s, memory drivers and
receivers for all the memory bits in the DDR memory
system. When the driver is logic low V TT sources current.
When the driver is logic high V TT sinks current. The
MIC5167 regulates V TT to VDDQ/2 during sourcing or
sinking current. The power dissipated in RS (bus
resistance) and RT (termination resistance) is V TT
squared divided by their respective resistance.
voltage.
Since the reference is simply V DDQ /2, any perturbations
on VDDQ will also appear at half the amplitude on the
reference. For this reason, both ceramics and low-ESR
bulk capacitors such as OS-CON are recommended on
the V DDQ supply. This will aid in performance by
improving the source impedance over a wide frequency
range.
Feedback
The feedback (FB) pin provides the path for the error
amplifier to regulate V TT . The FB input must also be
Kelvin connected to the V TT bypass capacitors. If the FB
input is connected to close to the MIC5167, the IR drop
of the PCB trace can cause the V TT voltage at the
memory chip to be too low. Placing the MIC5167 as
close as possible to the DDR memory will improve the
load regulation performance.
January 2012
11
M9999-012312-B
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