参数资料
型号: MIC5167YML TR
厂商: Micrel Inc
文件页数: 12/23页
文件大小: 0K
描述: IC REG SYNC BUCK 6A 1MHZ 24-MLF
标准包装: 1
应用: 转换器,DDR,QDR
输入电压: 2.6 V ~ 5.5 V
输出数: 1
输出电压: 最低可调至 0.6V
工作温度: -40°C ~ 125°C
安装类型: 表面贴装
封装/外壳: 24-VFQFN 裸露焊盘,24-MLF?
供应商设备封装: 24-MLF?(4x4)
包装: 标准包装
其它名称: 576-3793-6
Micrel, Inc.
The feedback trace is a noise sensitive input and should
be routed away from the switch node. A 0.1 μ F capacitor
placed next to the IC can help filter any high frequency
noise that may cause V TT errors.
Enable/Delay Pin
The internal circuits are held off until EN/DLY input
reaches the enable threshold of 1.24V. A 1μA current
source out of the IC is used to charge the delay
capacitor. The delay time is simply the time it takes 1μA
to charge C EN/DLY to 1.25V. Therefore:
MIC5167
VREF can also be manipulated for different applications.
A separate voltage source can be used to externally set
the reference point, bypassing the divider network. Also,
external resistor to V REF divider network can be added to
shift the reference point up or down.
PWM
The MIC5167 is a voltage mode, Pulse Width
Modulation (PWM) controller. By controlling the ratio of
on-to-off time, or duty cycle, a regulated DC output
voltage is achieved. As load or supply voltage changes,
so does the duty cycle to maintain a constant output
voltage. In cases where the input supply runs into a
1 × 10
t EN / DLY =
1 .24 × C EN / DLY
6
dropout condition, the MIC5167 will run at 100% duty
cycle.
The MIC5167 provides constant switching at 1MHz with
synchronous internal MOSFETs. The internal MOSFETs
The enable/delay pin is pulled low when the input
voltage is lower than the UVLO threshold, ensuring that
the delay start up voltage starts at zero.
Power-Good (PG)
The power-good output provides a under and over
voltage fault flag. The PG output remains high as long as
V TT is within ±15% range of V REF and goes low if output
moves beyond this range.
VREF
A minimum capacitor value of 100pF from V REF -to-
ground is required to remove high-frequency signals
reflected from the source (see Figure 3). Large
capacitance values (>1500pF) should be avoided.
Values greater than 1500pF slow down V REF and detract
from the reference voltage’s ability to track V DDQ during
high-speed load transients.
Figure 3. V REF Follows V DDQ
include a high-side P-Channel MOSFET from the input
supply to the switch pin and an N-Channel MOSFET
from the switch pin-to-ground. Since the low-side N-
Channel MOSFET provides the current during the off
cycle, very low power is dissipated during the off period.
PWM control provides fixed frequency operation. By
maintaining a constant switching frequency, predictable
fundamental and harmonic frequencies are achieved.
Other methods of regulation, such as burst and skip
modes, have frequency spectrums that change with load
that can interfere with sensitive communication
equipment.
Component selection
Input Capacitor
A 22μF X5R or X7R dielectrics ceramic capacitor is
recommended on each of the PVIN pins for bypassing.
Y5V dielectrics capacitor should not be used. Aside from
losing most of their capacitance over temperature, they
also become resistive at high frequencies. This reduces
their ability to filter out high frequency noise.
Output Capacitor
The MIC5167 was designed specifically for the use of
ceramic output capacitors. The 300μF can be increased
to improve transient performance. Since the MIC5167
uses voltage mode control, the control loop is affected
by the 180-deg phase shift generated by the complex
pole created by the inductor and output capacitor. For
this reason, do not use excessively large output
capacitors. The output capacitor requires either an X7R
or X5R dielectric. Y5V and Z5U dielectric capacitors,
aside from the undesirable effect of their wide variation
in capacitance over temperature, become resistive at
high frequencies. Using Y5V or Z5U capacitors can
cause instability in the MIC5167.
January 2012
12
M9999-012312-B
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