参数资料
| 型号： | MIC5167YML TR |
| 厂商： | Micrel Inc |
| 文件页数： | 16/23页 |
| 文件大小： | 0K |
| 描述： | IC REG SYNC BUCK 6A 1MHZ 24-MLF |
| 标准包装： | 1 |
| 应用： | 转换器，DDR，QDR |
| 输入电压： | 2.6 V ~ 5.5 V |
| 输出数： | 1 |
| 输出电压： | 最低可调至 0.6V |
| 工作温度： | -40°C ~ 125°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 24-VFQFN 裸露焊盘，24-MLF? |
| 供应商设备封装： | 24-MLF?（4x4） |
| 包装： | 标准包装 |
| 其它名称： | 576-3793-6 |
Micrel, Inc.
PCB Layout Guidelines
Inductor
MIC5167
Warning!!! To minimize EMI and output noise, follow
these layout recommendations.
PCB Layout is critical to achieve reliable, stable and
efficient performance. A ground plane is required to
control EMI and minimize the inductance in power,
signal and return paths.
The following guidelines should be followed to insure
proper operation of the MIC5167 converter.
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?
?
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Keep the inductor connection to the switch node
(SW) short.
Do not route any digital lines underneath or close to
the inductor.
Keep the switch node (SW) away from the feedback
(FB) pin.
To minimize noise, place a ground plane underneath
the inductor.
IC
?
The 22μF ceramic capacitor, which is connected to
the SVIN pin, must be located right at the IC. The
SVIN pin is very noise sensitive and placement of
the capacitor is very critical. Use wide traces to
connect to the SVIN and SGND pins.
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The inductor can be placed on the opposite side of
the PCB with respect to the IC. It does not matter
whether the IC or inductor is on the top or bottom as
long as there is enough air flow to keep the power
components within their temperature limits. The
input and output capacitors must be placed on the
same side of the board as the IC.
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The signal ground pin (SGND) must be connected
directly to the ground planes. Do not route the
SGND pin to the PGND Pad on the top layer.
Place the IC close to the point-of-load (POL).
Output Capacitor
? Use a wide trace to connect the output capacitor
ground terminal to the input capacitor ground
terminal.
?
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Use fat traces to route the input and output power
lines.
Signal and power grounds should be kept separate
and connected at only one location.
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Phase margin will change as the output capacitor
value and ESR changes. Contact the factory if the
output capacitor is different from what is shown in
the BOM.
Input Capacitor
? A 22μF X5R or X7R dielectrics ceramic capacitor is
recommended on each of the PVIN pins for
bypassing.
? Place the input capacitors on the same side of the
board and as close to the IC as possible.
?
Keep both the PVIN pin and PGND connections
short.
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Place several vias to the ground plane close to the
input capacitor ground terminal.
?
Use either X7R or X5R dielectric input capacitors.
Do not use Y5V or Z5U type capacitors.
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Do not replace the ceramic input capacitor with any
other type of capacitor. Any type of capacitor can be
placed in parallel with the input capacitor.
?
If a Tantalum input capacitor is placed in parallel
with the input capacitor, it must be recommended for
switching regulator applications and the operating
voltage must be derated by 50%.
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In “Hot-Plug” applications, a Tantalum or Electrolytic
bypass capacitor must be used to limit the over-
voltage spike seen on the input supply with power is
suddenly applied.
January 2012
16
?
?
The feedback divider network must be place close to
the IC with the bottom of R2 connected to SGND.
The feedback trace should be separate from the
power trace and connected as close as possible to
the output capacitor. Sensing a long high current
load trace can degrade the DC load regulation.
M9999-012312-B
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