参数资料
型号: MICRF507YML TR
厂商: Micrel Inc
文件页数: 13/47页
文件大小: 0K
描述: TXRX FSK LOW PWR W/AMP 32MLF
特色产品: MICRF507 Low-Power FSK Transceiver
标准包装: 1
系列: RadioWire®
频率: 470MHz ~ 510MHz
数据传输率 - 最大: 200kbps
调制或协议: FSK
应用: AMR,ISM,SRD
功率 - 输出: 10dBm
灵敏度: -113dBm
电源电压: 2 V ~ 2.5 V
电流 - 接收: 12mA
电流 - 传输: 21.5mA
数据接口: PCB,表面贴装
天线连接器: PCB,表面贴装
工作温度: -40°C ~ 85°C
封装/外壳: 32-VFQFN 裸露焊盘,32-MLF?
包装: 标准包装
其它名称: 576-3694-6
MICRF507YML TRDKR
MICRF507YML TRDKR-ND
Micrel, Inc.
MICRF507
Reading
?
Clock out 8 bits per register (one or more) to be
Any number of registers with consecutive addresses, from
one up to all 23, can be read.
Procedure:
? Bring CS active (high). IO is initially an input.
? Clock in a byte consisting of the address bits and
the R/W bit. The first seven bits are the address
(starting with MSB) of the register, or the first
register if more than one, to be read. The eighth
bit is the R/W bit, which is 1 as this is a read
operation. After the R/W bit is clocked in (falling
read through IO, MSB first. Rising edges of SCLK
bring each bit to IO. The user can then
conveniently sample the bit at the next falling edge
of SCLK.
? Bring CS low to end the transaction. IO reverts to
being an input.
Figure 3 shows how to read one register. To read more
registers at consecutive addresses, continue pulsing SCLK
eight times for each register to be read before de-asserting
CS.
edge of SCLK), the next rising edge on SCLK will
enable IO as an output for the duration of the
transaction.
Figure 3. Reading a Byte from a Register
Figure 4. Definitions of Control Interface Timing Parameters
October 2, 2013
13
Revision 2.2
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