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参数资料
| 型号： | MK1492-04RTRLF |
| 元件分类： | 时钟产生/分配 |
| 英文描述： | 75 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO28 |
| 封装： | 0.150 INCH, SSOP-28 |
| 文件页数： | 6/8页 |
| 文件大小： | 102K |
| 代理商： | MK1492-04RTRLF |
MK1492-04
OPTi Firestar+ Clock Source
MDS1492-04C
6
Revision 4308
Printed 4/30/98
MicroClock Division of ICS1271 Parkmoor Ave.San JoseCA95126(408)295-9800tel(408)295-9818fax
PRELIMINARY INFORMATION
ICRO
CLOCK
Serial Configuration Command Bitmaps
Byte 0: Functional and Frequency Select Clock Register
Note: PD = Power-On Default
Bit
Pin #
Description
PD
7
--
(Reserved) MSB
0
6
--
(Reserved)
0
5
--
LE
1
4
--
OE
1
3
--
Enable I2C Frequency Select (Bits 0 and 1)
0
2
21
48/14.3 MHz (Frequency Select) 1 = 48 MHz, 0 = 14.3 MHz
1
--
Bit 1
Bit 0
1
0
0 - 60 MHz HOST Clock
1
0
1 - 66.66 MHz HOST Clock
1
0 - 50 MHz HOST Clock
1
1 - 75 MHz HOST Clock
Byte 1: CPU, 24/48 MHz Active/Inactive Register (1 = enable, 0 = disable)
Notes:
Bit 7 enables/disables Pin 28 (F1) when the output is 24 MHz (SEL1 = 1).
Byte 2: PCI Active/Inactive Register (1 = enable, 0 = disable)
Notes:
Bit 3 enables/disables Pin 28 (F1) when the output is PCI (SEL1 = 0).
Bit
Pin #
Name
Description
7
28
F1
PCI/14.3/24 MHz (Active/Inactive)
6
21
48/14.3M 48/14.3 MHz (Active/Inactive)
5
--
(Reserved)
4
N/A
--
CPUCLK4 (Active/Inactive)
3
N/A
--
CPUCLK3 (Active/Inactive)
2
10
HOST2 CPUCLK2 (Active/Inactive)
1
N/A
--
CPUCLK1 (Active/Inactive)
0
8
EHOST1 Early Host Clock (Active/Inactive)
Bit
Pin #
Name
Description
7
--
(Reserved)
6
22
PCIF
PCICLK_F (Active/Inactive)
5
N/A
--
PCICLK5 (Active/Inactive)
4
N/A
--
PCICLK4 (Active/Inactive)
3
28
F1
PCICLK3 (Active/Inactive)
2
27
PCI
PCICLK2 (Active/Inactive)
1
25
PCI
PCICLK1 (Active/Inactive)
0
24
PCI
PCICLK0 (Active/Inactive)
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| MK1493-01 | 制造商:ICS 制造商全称:ICS 功能描述:PCI Clock Generator |
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