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参数资料
| 型号： | MK1492-04RTRLF |
| 元件分类： | 时钟产生/分配 |
| 英文描述： | 75 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO28 |
| 封装： | 0.150 INCH, SSOP-28 |
| 文件页数： | 8/8页 |
| 文件大小： | 102K |
| 代理商： | MK1492-04RTRLF |
MK1492-04
OPTi Firestar+ Clock Source
MDS1492-04C
8
Revision 4308
Printed 4/30/98
MicroClock Division of ICS1271 Parkmoor Ave.San JoseCA95126(408)295-9800tel(408)295-9818fax
PRELIMINARY INFORMATION
ICRO
CLOCK
While the information presented herein has been checked for both accuracy and reliability, ICS assumes no responsibility for either its use or for the infringement of any patents
or other rights of third parties, which would result from its use. No other circuits, patents, or licenses are implied. This product is intended for use in normal commercial
applications. Any other applications such as those requiring extended temperature range, high reliability, or other extraordinary environmental requirements are not
recommended without additional processing by ICS. ICS reserves the right to change any circuitry or specifications without notice. ICS does not authorize or warrant any ICS
product for use in life support devices or critical medical instruments.
Package Outline and Package Dimensions
Ordering Information
Pentium is a trademark of Intel Corporation
28 pin SSOP
Inches
Millimeters
Symbol
Min
Max
Min
Max
A
0.061
0.068
1.55
1.73
b
0.008
0.012
0.203
0.305
c
0.007
0.010
0.18
0.254
D
0.385
0.400
9.78
10.160
E
0.150
0.160
3.81
4.064
H
0.230
0.245
5.84
6.223
e
.025 BSC
0.635 BSC
h
0.016
0.410
Q
0.004
0.01
0.102
0.254
Part/Order Number
Marking
Low EMI Feature
Package
Temperature
MK1492-04R
Yes
28 pin SSOP
0 to 70 C
MK1492-04RTR
MK1492-04R
Yes
Add Tape & Reel
0 to 70 C
I/O Structure
The MK1492 provides more functionality in a 28 pin package by using a
unique I/O technique. The device checks the status of all I/O pins during
power-up and at exit from the Power Down state. This status (pulled high,
low, or mid-level) then determines the frequency selections and power
down modes (see the tables on pages 2, 4, and 5). Within 10ms after power
up, the inputs change to outputs and the clocks start up. In the diagrams to
the right, the 33
resistors are the normal output termination resistors.
The 10k
resistor pulls low to generate a logic zero. Internal pull-up
resistors (approx. 100k
) are present on DS, SEL0, FS, LE, CPUS#,
PCISTP#, and CSSS. Internal resistors on PEN, SEL1, and OE pull to a
mid-level (M).
The CPUS# input should be connected as shown to implement the 0, M,
and 1 selections per the Power Down Control Table on page 2. Contact
MicroClock for suggested connections of PCISTP# if the PLL STOP
mode will be used.
to load
I/O
CPUS#
For select
= 0 (low)
10k
10k
CPU_STOP#
Don’t stuff for
“1” selection
14k
PWR_DOWN#
Signals from
Firestar
33
b
D
E
H
e
Q
c
A
h x 45°
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相关代理商/技术参数 |
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|---|---|
| MK1493-01 | 制造商:ICS 制造商全称:ICS 功能描述:PCI Clock Generator |
| MK1493-01G | 制造商:ICS 制造商全称:ICS 功能描述:PCI Clock Generator |
| MK1493-01GTR | 制造商:ICS 制造商全称:ICS 功能描述:PCI Clock Generator |
| MK1493-03B | 制造商:IDT 制造商全称:Integrated Device Technology 功能描述:PCI CLOCK GENERATOR |
| MK1493-03BGILF | 制造商:Integrated Device Technology Inc 功能描述:DIFFERENTIAL SPREAD SPECTRUM CLOCK DRIVER, TSSOP16 - Rail/Tube |
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