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参数资料
| 型号： | MK1492-04RTRLF |
| 元件分类： | 时钟产生/分配 |
| 英文描述： | 75 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO28 |
| 封装： | 0.150 INCH, SSOP-28 |
| 文件页数： | 7/8页 |
| 文件大小： | 102K |
| 代理商： | MK1492-04RTRLF |
MK1492-04
OPTi Firestar+ Clock Source
MDS1492-04C
7
Revision 4308
Printed 4/30/98
MicroClock Division of ICS1271 Parkmoor Ave.San JoseCA95126(408)295-9800tel(408)295-9818fax
PRELIMINARY INFORMATION
ICRO
CLOCK
Byte 3: SDRAM Active/Inactive Register (1 = enable, 0 = disable)
Serial Configuration Command Bitmaps (cont.)
Byte 4: SDRAM Active/Inactive Register (1 = enable, 0 = disable)
Bit
Pin #
Name
Description
7
N/A
--
SDRAM15
6
N/A
--
SDRAM14
5
N/A
--
SDRAM13
4
N/A
--
SDRAM12
3
N/A
--
SDRAM11
2
N/A
--
SDRAM10
1
N/A
--
SDRAM9
0
N/A
--
SDRAM8
Byte 5: Peripheral Active/Inactive Register (1 = enable, 0 = disable)
Notes:
Bit 1 enables/disables Pin 28 (F1) when the output is 14.318 MHz (SEL1 = M).
Notes:Inactive means outputs are held LOW and are disabled from switching.
Byte 6 is not available on the MK1492-04.
Bit
Pin #
Name
Description
7
N/A
--
SDRAM7
6
N/A
--
SDRAM6
5
N/A
--
SDRAM5
4
19
DS
Writing "1" tri-states HOST7,8
3
19
HOST6,8 SDRAM3 (Active/Inactive)
2
18
HOST5,7 SDRAM2 (Active/Inactive)
1
13
HOST4 SDRAM1 (Active/Inactive)
0
12
HOST3 SDRAM0 (Active/Inactive)
Bit
Pin #
Name
Description
7
--
(Reserved)
6
--
(Reserved)
5
--
(Reserved)
4
N/A
--
IOAPIC0
3
--
(Reserved)
2
--
(Reserved)
1
28
F1
REF1
0
5
14.3
REF0 (Active/Inactive)
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