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参数资料
| 型号： | MPC8245LZU266B |
| 厂商： | MOTOROLA INC |
| 元件分类： | 微控制器/微处理器 |
| 英文描述： | 32-BIT, 266 MHz, RISC PROCESSOR, PBGA352 |
| 封装： | 35 X 35 MM, 1.65 MM HEIGHT, 1.27 MM PITCH, CAVITY-UP, TBGA-352 |
| 文件页数： | 52/64页 |
| 文件大小： | 940K |
| 代理商： | MPC8245LZU266B |
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56
MPC8245 Integrated Processor Hardware Specifications
MOTOROLA
Document Revision History
0.2
Changed core supply voltage to 2.0 ± 100 mV in Section 1.3. (Supply voltage of 1.8 ± 100 mV is no longer
recommended.)
Changed rows 2, 5, and 6 of Table 2 to 2.0 ± 100 mV in the “Recommended Value” column.
Changed the power consumption numbers in Table 5 to reflect the power values for Vdd = 2.0 V. (Notes 2,
3, 4, and 5 of the table were also updated to reflect the new value of Vdd.)
Updated Table 9 for Vdd/AVdd/AVdd2 to 2.0 ± 100 mV.
Table 8: Vdd/AVdd/AVdd2 was changed to 2.0 V for both CPU frequency offerings. Note 2 was updated by
removing the “at reduced voltage...” statement.
Table 10: Update maximum time of the rows 12a0 through 12a3.
Table 16: Fixed overbars for the active-low signals. Changed pin type information for Vdd, AVdd, and AVdd2
to 2.0 V.
Changed note 16 of Table 17 to a value of 2.0 V for Vdd/AVdd/AVdd2.
Removed second sentence of the second paragraph in Section 1.7.2, because it referenced information
about a 1.8-V design.
Removed reference to 1.8 V in third sentence of Section 1.7.7.
0.3
Section 1.4.1.5: Changed Max-FP value for 33/133/266 of Table 5, from 2.3 to 2.1 watts, to represent
characterizaiton data. Changed Note 4 to say Vdd = 2.1 for power measurements (for 2-V part). Changed
numbers for maximum I/O power supplies for OVdd and GVdd to represent characterization data.
Section 1.4.3.1: Added four graphs (Figures 5–8) and description for DLL Locking Range vs. Frequency of
Operation to replace Figure 5 of Rev 0.2 document.
Section 1.4.3.2: Added row (item 11: Tsu—SDRAM_SYNC_IN to PCI_SYNC_IN timing) to Table 9, to
include offset change requirement.
Section 1.5.3: Changed Note 4 of PLL_CFG pins in Table 16 to Note 20.
Section 1.7.2: Added diode (MUR420) to Figure 27, Voltage Sequencing Circuit. This is to compensate for
voltage extremes in design.
Section 1.7.5: Added sentence with regards to SDRAM_SYNC_IN to PCI_SYNC_IN timing requirement
(Tsu) as a connection recommendation.
Section 1.7.8: Mention of Tsu offset timing, and driver capability differences between the MPC8240 and the
MPC8245.
0.4
Section 1.2: Changed Features list (format) to match with the features list of the MPC8245 Integrated
Processor User’s Manual.
Section 1.4.1.2: Updated Table 2 to include 1.8 ± 100mV numbers.
Section 1.4.3: Changed Table 7 to include new part offerings of 333 and 350 MHz. Added rows to include
VCO frequency ranges for all parts for both memory VCO and CPU VCO.
Section 1.4.1.5: Updated power consumption table to include 1.8 V (Vdd) and higher frequency numbers.
Section 1.4.3: Updated Table 7 to include higher frequency offerings and CPU VCO frequency range.
Section 1.4.3.1: Changed lettering to caps for DLL_EXTEND and DLL_MAX_DELAY in graph description
section.
Section 1.4.3.2: Changed name of item 11 from Tsu—SDRAM_SYNC_IN to PCI_SYNC_IN Time to
Tos—SDRAM_SYNC_IN to sys_logic_clk Offset Time. Changed name to Tos in Note 7 as well.
Section 1.6: Updated notes in Table 17. Included minimum and maximum VCO numbers for memory VCO.
Changed Note 13 for location of PLL_CFG[0:4] to correct bits location. Bits 7–4 of register offset <0xE2>.
Added Table 18 to cover PLL configuration of higher frequency part offerings.
Section: 1.7: Changed frequency ranges for reference numbers 0, 9, 10, and 17, for the 300 MHz part, to
include the higher memory bus frequencies when operating at lower CPU bus frequencies. Added Table 18
to include PLL configurations for the 333 MHz and the 350 MHz CPU part offerings. Added VCO multiplers
in Tables 17 and 18.
Section 1.7.8: Changed Tsu—SDRAM_SYNC_IN to PCI_SYNC_IN Time to Tos—SDRAM_
SYNC_IN to sys_logic_clk Offset Time.”
Section 1.7.10: Added vendor (Cool Innovations, Inc.) to list of Heat Sink vendors.
0.5
Corrected labels for Figures 5 through 8.
Table 20. Revision History Table (continued)
Rev. No.
Substantive Change(s)
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相关代理商/技术参数 |
参数描述 |
|---|---|
| MPC8245LZU266D | 功能描述:微处理器 - MPU 266MHz 505.4MIPS RoHS:否 制造商:Atmel 处理器系列:SAMA5D31 核心:ARM Cortex A5 数据总线宽度:32 bit 最大时钟频率:536 MHz 程序存储器大小:32 KB 数据 RAM 大小:128 KB 接口类型:CAN, Ethernet, LIN, SPI,TWI, UART, USB 工作电源电压:1.8 V to 3.3 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:FBGA-324 |
| MPC8245LZU300D | 功能描述:微处理器 - MPU 300MHz 570MIPS RoHS:否 制造商:Atmel 处理器系列:SAMA5D31 核心:ARM Cortex A5 数据总线宽度:32 bit 最大时钟频率:536 MHz 程序存储器大小:32 KB 数据 RAM 大小:128 KB 接口类型:CAN, Ethernet, LIN, SPI,TWI, UART, USB 工作电源电压:1.8 V to 3.3 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:FBGA-324 |
| MPC8245LZU333D | 功能描述:微处理器 - MPU 333MHz 632.7MIPS RoHS:否 制造商:Atmel 处理器系列:SAMA5D31 核心:ARM Cortex A5 数据总线宽度:32 bit 最大时钟频率:536 MHz 程序存储器大小:32 KB 数据 RAM 大小:128 KB 接口类型:CAN, Ethernet, LIN, SPI,TWI, UART, USB 工作电源电压:1.8 V to 3.3 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:FBGA-324 |
| MPC8245LZU350D | 功能描述:微处理器 - MPU 350MHz 665MIPS RoHS:否 制造商:Atmel 处理器系列:SAMA5D31 核心:ARM Cortex A5 数据总线宽度:32 bit 最大时钟频率:536 MHz 程序存储器大小:32 KB 数据 RAM 大小:128 KB 接口类型:CAN, Ethernet, LIN, SPI,TWI, UART, USB 工作电源电压:1.8 V to 3.3 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:FBGA-324 |
| MPC8245RZU400D | 制造商:FREESCALE 制造商全称:Freescale Semiconductor, Inc 功能描述:Part Number Specification for the MPC8245ARZUnnnX Series |
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