- 您现在的位置：买卖IC网 > PDF目录4081 > MPC8308ZQAFD (Freescale Semiconductor)MPU POWERQUICC II PRO 473MAPBGA PDF资料下载
参数资料
| 型号： | MPC8308ZQAFD |
| 厂商： | Freescale Semiconductor |
| 文件页数： | 70/83页 |
| 文件大小： | 0K |
| 描述： | MPU POWERQUICC II PRO 473MAPBGA |
| 标准包装： | 84 |
| 系列： | MPC83xx |
| 处理器类型： | 32-位 MPC83xx PowerQUICC II Pro |
| 速度： | 333MHz |
| 电压： | 1V |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 473-LFBGA |
| 供应商设备封装： | 473-MAPBGA（19x19） |
| 包装： | 托盘 |
第1页第2页第3页第4页第5页第6页第7页第8页第9页第10页第11页第12页第13页第14页第15页第16页第17页第18页第19页第20页第21页第22页第23页第24页第25页第26页第27页第28页第29页第30页第31页第32页第33页第34页第35页第36页第37页第38页第39页第40页第41页第42页第43页第44页第45页第46页第47页第48页第49页第50页第51页第52页第53页第54页第55页第56页第57页第58页第59页第60页第61页第62页第63页第64页第65页第66页第67页第68页第69页当前第70页第71页第72页第73页第74页第75页第76页第77页第78页第79页第80页第81页第82页第83页
MPC8308 PowerQUICC II Pro Processor Hardware Specification, Rev. 3
72
Freescale Semiconductor
Clocking
21.1
System Clock Domains
The primary clock input (SYS_CLK_IN) frequency is multiplied up by the system phase-locked loop
(PLL) and the clock unit to create three major clock domains:
The coherent system bus clock (csb_clk)
The internal clock for the DDR controller (ddr_clk)
The internal clock for the local bus interface unit (lbc_clk)
The csb_clk frequency is derived as follows:
csb_clk = [SYS_CLK_IN] × SPMF
The csb_clk serves as the clock input to the e300 core. A second PLL inside the core multiplies up the
csb_clk frequency to create the internal clock for the core (core_clk). The system and core PLL multipliers
are selected by the SPMF and COREPLL fields in the reset configuration word low (RCWL), which is
loaded at power-on reset or by one of the hard-coded reset options. For more information, see the Reset
Clock Configuration chapter in the MPC8308 PowerQUICC II Pro Processor Reference Manual.
The DDR SDRAM memory controller will operate with a frequency equal to twice the frequency of
csb_clk. Note that ddr_clk is not the external memory bus frequency; ddr_clk passes through the DDR
clock divider (
2) to create the differential DDR memory bus clock outputs (MCK and MCK). However,
the data rate is the same frequency as ddr_clk.
The local bus memory controller will operate with a frequency equal to the frequency of csb_clk. Note that
lbc_clk is not the external local bus frequency; lbc_clk passes through the LBC clock divider to create the
external local bus clock outputs (LSYNC_OUT and LCLK0:2). The LBC clock divider ratio is controlled
by LCCR[CLKDIV]. For more information, see the Reset Clock Configuration chapter in the MPC8308
PowerQUICC II Pro Processor Reference Manual.
In addition, some of the internal units may be required to be shut off or operate at lower frequency than
the csb_clk frequency. These units have a default clock ratio that can be configured by a memory mapped
register after the device comes out of reset. Table 54 specifies which units have a configurable clock
frequency. For more information, see Reset Clock Configuration chapter in the MPC8308 PowerQUICC
II Pro Processor Reference Manual.
NOTE
The clock ratios of these units must be set before they are accessed.
Table 54. Configurable Clock Units
Unit
Default Frequency
Options
eTSEC1,eTSEC2
csb_clk/3
Off, csb_clk, csb_clk/2, csb_clk/3
I2C
csb_clk
Off, csb_clk,csb_clk/2, csb_clk/3
DMA complex
csb_clk
Off, csb_clk,csb_clk/2,csb_clk/3
PCIEXP
csb_clk
Off, csb_clk
eSDHC
csb_clk
Off, csb_clk, csb_clk/2, csb_clk/3
USB
csb_clk
Off, csb_clk, csb_clk/2, csb_clk/3
相关PDF资料 |
PDF描述 |
|---|---|
| AMM43DRMI-S288 | CONN EDGECARD 86POS .156 EXTEND |
| AMM43DRMT | CONN EDGECARD 86POS .156 WW |
| IDT7024L20PFGI8 | IC SRAM 64KBIT 20NS 100TQFP |
| MPC8306CVMACDCA | IC PROCESSOR E300 369MAPBGA |
| MPC8309VMADDCA | IC PROCESSOR E300 489MAPBGA |
相关代理商/技术参数 |
参数描述 |
|---|---|
| MPC8308ZQAFDA | 功能描述:微处理器 - MPU E300 MP Pb 333 RoHS:否 制造商:Atmel 处理器系列:SAMA5D31 核心:ARM Cortex A5 数据总线宽度:32 bit 最大时钟频率:536 MHz 程序存储器大小:32 KB 数据 RAM 大小:128 KB 接口类型:CAN, Ethernet, LIN, SPI,TWI, UART, USB 工作电源电压:1.8 V to 3.3 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:FBGA-324 |
| MPC8308ZQAGD | 功能描述:微处理器 - MPU E300 MP Pb 400 RoHS:否 制造商:Atmel 处理器系列:SAMA5D31 核心:ARM Cortex A5 数据总线宽度:32 bit 最大时钟频率:536 MHz 程序存储器大小:32 KB 数据 RAM 大小:128 KB 接口类型:CAN, Ethernet, LIN, SPI,TWI, UART, USB 工作电源电压:1.8 V to 3.3 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:FBGA-324 |
| MPC8308ZQAGDA | 功能描述:微处理器 - MPU E300 MP Pb 400 RoHS:否 制造商:Atmel 处理器系列:SAMA5D31 核心:ARM Cortex A5 数据总线宽度:32 bit 最大时钟频率:536 MHz 程序存储器大小:32 KB 数据 RAM 大小:128 KB 接口类型:CAN, Ethernet, LIN, SPI,TWI, UART, USB 工作电源电压:1.8 V to 3.3 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:FBGA-324 |
| MPC8309 | 制造商:FREESCALE 制造商全称:Freescale Semiconductor, Inc 功能描述:PowerQUICC II Pro Processors |
| MPC8309CVMADDC | 制造商:Freescale Semiconductor 功能描述:E300 MP EXT TMP 266 - Trays |
发布紧急采购，3分钟左右您将得到回复。