参数资料
型号: MPC8309VMAFDCA
厂商: FREESCALE SEMICONDUCTOR INC
元件分类: 微控制器/微处理器
英文描述: 32-BIT, 333 MHz, RISC PROCESSOR, PBGA489
封装: 19 X 19 MM, 1.61 MM HEIGHT, 0.80 MM PITCH, LEAD FREE, PLASTIC, MAPBGA-489
文件页数: 67/81页
文件大小: 484K
代理商: MPC8309VMAFDCA
MPC8309 PowerQUICC II Pro Integrated Communications Processor Family Hardware Specifications, Rev. 1
Freescale Semiconductor
7
Overview
IO Sequencer
Direct memory access (DMA) controller (DMA Engine 2)
— Four independent fully programmable DMA channels
— Concurrent execution across multiple channels with programmable bandwidth control
— Misaligned transfer capability for source/destination address
— Data chaining and direct mode
— Interrupt on completed segment, error, and chain
DUART
— Supports 2 DUART
— Each has two 2-wire interfaces (RxD, TxD)
– The same can be configured as one 4-wire interface (RxD, TxD, RTS, CTS)
— Programming model compatible with the original 16450 UART and the PC16550D
Serial peripheral interface (SPI)
— Master or slave support
Power managemnt controller (PMC)
— Supports core doze/nap/sleep/ power management
— Exits low power state and returns to full-on mode when
– The core internal time base unit invokes a request to exit low power state
– The power management controller detects that the system is not idle and there are
outstanding transactions on the internal bus or an external interrupt.
Parallel I/O
— General-purpose I/O (GPIO)
– 56 parallel I/O pins multiplexed on various chip interfaces
– Interrupt capability
System timers
— Periodic interrupt timer
— Software watchdog timer
— Eight general-purpose timers
Real time clock (RTC) module
— Maintains a one-second count, unique over a period of thousands of years
— Two possible clock sources:
– External RTC clock (RTC_PIT_CLK)
– CSB bus clock
IEEE Std. 1149.1 compliant JTAG boundary scan
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