参数资料
型号: MPC8315VRAGDA
厂商: FREESCALE SEMICONDUCTOR INC
元件分类: 微控制器/微处理器
英文描述: 32-BIT, 400 MHz, MICROPROCESSOR, PBGA620
封装: 29 X 29 MM, 2.23 MM HEIGHT, 1 MM PITCH, LEAD FREE, TEPBGAII-620
文件页数: 32/112页
文件大小: 1283K
代理商: MPC8315VRAGDA
MPC8315E PowerQUICC II Pro Processor Hardware Specifications, Rev. 0
26
Freescale Semiconductor
Ethernet: Three-Speed Ethernet, MII Management
9.2
MII, RMII, RGMII, and RTBI AC Timing Specifications
The AC timing specifications for MII, RMII, RGMII, and RTBI are presented in this section.
9.2.1
MII AC Timing Specifications
This section describes the MII transmit and receive AC timing specifications.
9.2.1.1
MII Transmit AC Timing Specifications
Table 25 provides the MII transmit AC timing specifications.
Table 24. RGMII/RTBI (When Operating at 2.5 V) DC Electrical Characteristics
Parameters
Symbol
Conditions
Min
Max
Unit
Supply voltage 2.5 V
LVDD
2.37
2.63
V
Output high voltage
VOH
IOH = –1.0 mA
LVDD = Min
2.00
LVDD + 0.3
V
Output low voltage
VOL
IOL = 1.0 mA
LVDD = Min
VSS – 0.3
0.40
V
Input high voltage
VIH
LVDD = Min
1.7
LVDD + 0.3
V
Input low voltage
VIL
LVDD =Min
–0.3
0.70
V
Input high current
IIH
VIN
1 = LVDD
15
μA
Input low current
IIL
VIN
1 = VSS
–15
μA
Note:
1. Note that the symbol VIN, in this case, represents the LVIN symbol referenced in Table 1 and Table 2.
Table 25. MII Transmit AC Timing Specifications
At recommended operating conditions with LVDD of 3.3 V ± 300 mv.
Parameter/Condition
Symbol 1
Min
Typ
Max
Unit
TX_CLK clock period 10 Mbps
tMTX
—400
ns
TX_CLK clock period 100 Mbps
tMTX
—40
ns
TX_CLK duty cycle
tMTXH/tMTX
35
65
%
TX_CLK to MII data TXD[3:0], TX_ER, TX_EN delay
tMTKHDX
1
5
15
ns
TX_CLK data clock rise VIL(min) to VIH(max)
tMTXR
1.0
4.0
ns
TX_CLK data clock fall VIH(max) to VIL(min)
tMTXF
1.0
4.0
ns
Note:
1. The symbols used for timing specifications follow the pattern of t(first two letters of functional block)(signal)(state)(reference)(state) for
inputs and t(first two letters of functional block)(reference)(state)(signal)(state) for outputs. For example, tMTKHDX symbolizes MII transmit
timing (MT) for the time tMTX clock reference (K) going high (H) until data outputs (D) are invalid (X). Note that, in general,
the clock reference symbol representation is based on two to three letters representing the clock of a particular functional.
For example, the subscript of tMTX represents the MII(M) transmit (TX) clock. For rise and fall times, the latter convention is
used with the appropriate letter: R (rise) or F (fall).
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