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| 型号： | MPC8323ECZQAFDC |
| 厂商： | Freescale Semiconductor |
| 文件页数： | 17/82页 |
| 文件大小： | 0K |
| 描述： | IC MPU PWRQUICC II 516-PBGA |
| 产品培训模块： | MPC8323E PowerQUICC II Pro Processor |
| 标准包装： | 40 |
| 系列： | MPC83xx |
| 处理器类型： | 32-位 MPC83xx PowerQUICC II Pro |
| 速度： | 333MHz |
| 电压： | 1V |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 516-BBGA |
| 供应商设备封装： | 516-FPBGA（27x27） |
| 包装： | 托盘 |
| 配用： | MPC8323E-RDB-ND - BOARD REFERENCE DESIGN |
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MPC8323E PowerQUICC II Pro Integrated Communications Processor Family Hardware Specifications, Rev. 4
24
Freescale Semiconductor
Ethernet and MII Management
Figure 11 provides the AC test load.
Figure 11. AC Test Load
Figure 12 shows the RMII receive AC timing diagram.
Figure 12. RMII Receive AC Timing Diagram
8.3
Ethernet Management Interface Electrical Characteristics
The electrical characteristics specified here apply to MII management interface signals MDIO
(management data input/output) and MDC (management data clock). The electrical characteristics for
MII, and RMII are specified in Section 8.1, “Ethernet Controller (10/100 Mbps)—MII/RMII Electrical
REF_CLK clock fall time VIH(max) to VIL(min)
tRMXF
1.0
—
4.0
ns
Note:
1. The symbols used for timing specifications follow the pattern of t(first three letters of functional block)(signal)(state)(reference)(state) for
inputs and t(first two letters of functional block)(reference)(state)(signal)(state) for outputs. For example, tRMRDVKH symbolizes RMII
receive timing (RMR) with respect to the time data input signals (D) reach the valid state (V) relative to the tRMX clock
reference (K) going to the high (H) state or setup time. Also, tRMRDXKL symbolizes RMII receive timing (RMR) with respect to
the time data input signals (D) went invalid (X) relative to the tRMX clock reference (K) going to the low (L) state or hold time.
Note that, in general, the clock reference symbol representation is based on three letters representing the clock of a particular
functional. For example, the subscript of tRMX represents the RMII (RM) reference (X) clock. For rise and fall times, the latter
convention is used with the appropriate letter: R (rise) or F (fall).
Table 26. RMII Receive AC Timing Specifications (continued)
At recommended operating conditions with OVDD of 3.3 V ± 10%.
Parameter/Condition
Symbol1
Min
Typical
Max
Unit
Output
Z0 = 50 Ω
OVDD/2
RL = 50 Ω
REF_CLK
RXD[1:0]
tRMRDXKH
tRMX
tRMXH
tRMXR
tRMXF
CRS_DV
RX_ER
tRMRDVKH
Valid Data
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相关代理商/技术参数 |
参数描述 |
|---|---|
| MPC8323ECZQAFDCA | 制造商:FREESCALE 制造商全称:Freescale Semiconductor, Inc 功能描述:PowerQUICC? II Pro Integrated Communications Processor Family Hardware Specifications |
| MPC8323EEC | 制造商:FREESCALE 制造商全称:Freescale Semiconductor, Inc 功能描述:PowerQUICC? II Pro Integrated Communications Processor Family Hardware Specifications |
| MPC8323E-MDS-PB | 功能描述:开发板和工具包 - 其他处理器 MPC8323E PROCESSOR BOARD RoHS:否 制造商:Freescale Semiconductor 产品:Development Systems 工具用于评估:P3041 核心:e500mc 接口类型:I2C, SPI, USB 工作电源电压: |
| MPC8323E-RDB | 功能描述:开发板和工具包 - 其他处理器 REFERENCE DESIGN PQII PR RoHS:否 制造商:Freescale Semiconductor 产品:Development Systems 工具用于评估:P3041 核心:e500mc 接口类型:I2C, SPI, USB 工作电源电压: |
| MPC8323E-RDB | 制造商:Freescale Semiconductor 功能描述:MPC8323E Integrated Multiservice Gateway |
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