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参数资料
| 型号： | MPC950FAR2 |
| 厂商： | FREESCALE SEMICONDUCTOR INC |
| 元件分类： | 时钟产生/分配 |
| 英文描述： | 180 MHz, PROC SPECIFIC CLOCK GENERATOR, PQFP32 |
| 封装： | 7 X 7 MM, LQFP-32 |
| 文件页数： | 2/10页 |
| 文件大小： | 131K |
| 代理商： | MPC950FAR2 |
MPC950
MOTOROLA ADVANCED CLOCK DRIVERS DEVICE DATA
159
Figure 11. Single versus Dual Waveforms
TIME (nS)
VOL
TAGE
(V)
3.0
2.5
2.0
1.5
1.0
0.5
0
2
4
6
8
10
12
14
OutB
tD = 3.9386
OutA
tD = 3.8956
In
Since this step is well above the threshold region it will not
cause any false clock triggering, however designers may be
uncomfortable with unwanted reflections on the line. To better
match the impedances when driving multiple lines the situation
in Figure 12 should be used. In this case the series terminating
resistors are reduced such that when the parallel combination
is added to the output buffer impedance the line impedance is
perfectly matched.
Figure 12. Optimized Dual Line Termination
7
MPC950
OUTPUT
BUFFER
RS = 36
ZO = 50
RS = 36
ZO = 50
7
+ 36 k 36 = 50 k 50
25
= 25
SPICE level output buffer models are available for engi-
neers who want to simulate their specific interconnect
schemes. In addition IV characteristics are in the process of
being generated to support the other board level simulators in
general use.
2
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