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参数资料
| 型号： | MPC950FAR2 |
| 厂商： | FREESCALE SEMICONDUCTOR INC |
| 元件分类： | 时钟产生/分配 |
| 英文描述： | 180 MHz, PROC SPECIFIC CLOCK GENERATOR, PQFP32 |
| 封装： | 7 X 7 MM, LQFP-32 |
| 文件页数： | 9/10页 |
| 文件大小： | 131K |
| 代理商： | MPC950FAR2 |
MPC950
MOTOROLA ADVANCED CLOCK DRIVERS DEVICE DATA
157
puts from the relatively sensitive internal analog phase–locked
loop. In a controlled environment such as an evaluation board
this level of isolation is sufficient. However, in a digital system
environment where it is more difficult to minimize noise on the
power supplies a second level of isolation may be required.
The simplest form of isolation is a power supply filter on the
VCCA pin for the MPC950.
Figure 8 illustrates a typical power supply filter scheme. The
MPC950 is most susceptible to noise with spectral content in
the 1KHz to 1MHz range. Therefore the filter should be de-
signed to target this range. The key parameter that needs to be
met in the final filter design is the DC voltage drop that will be
seen between the VCC supply and the VCCA pin of the
MPC950. From the data sheet the IVCCA current (the current
sourced through the VCCA pin) is typically 15mA (20mA maxi-
mum), assuming that a minimum of 3.0V must be maintained
on the VCCA pin very little DC voltage drop can be tolerated
when a 3.3V VCC supply is used. The resistor shown in
Figure 8 must have a resistance of 10–15
to meet the voltage
drop criteria. The RC filter pictured will provide a broadband
filter with approximately 100:1 attenuation for noise whose
spectral content is above 20KHz. As the noise frequency
crosses the series resonant point of an individual capacitor it’s
overall impedance begins to look inductive and thus increases
with increasing frequency. The parallel capacitor combination
shown ensures that a low impedance path to ground exists for
frequencies well above the bandwidth of the PLL. It is recom-
mended that the user start with an 8–10
resistor to avoid
potential VCC drop problems and only move to the higher value
resistors when a higher level of attenuation is shown to be
needed.
Figure 8. Power Supply Filter
VCCA
VCC
MPC950
0.01F
22F
0.01F
3.3V
RS=5-15
Although the MPC950 has several design features to mini-
mize the susceptibility to power supply noise (isolated power
and grounds and fully differential PLL) there still may be ap-
plications in which overall performance is being degraded due
to system power supply noise. The power supply filter
schemes discussed in this section should be adequate to elim-
inate power supply noise related problems in most designs.
Using the On–Board Crystal Oscillator
The MPC950 features an on–board crystal oscillator to al-
low for seed clock generation as well as final distribution. The
on–board oscillator is completely self contained so that the
only external component required is the crystal. As the oscilla-
tor is somewhat sensitive to loading on its inputs the user is
advised to mount the crystal as close to the MPC950 as pos-
sible to avoid any board level parasitics. To facilitate co–loca-
tion surface mount crystals are recommended, but not re-
quired.
The oscillator circuit is a series resonant circuit as opposed
to the more common parallel resonant circuit, this eliminates
the need for large on–board capacitors. Because the design is
a series resonant design for the optimum frequency accuracy
a series resonant crystal should be used (see specification
table below). Unfortunately most off the shelf crystals are char-
acterized in a parallel resonant mode. However a parallel reso-
nant crystal is physically no different than a series resonant
crystal, a parallel resonant crystal is simply a crystal which has
been characterized in its parallel resonant mode. Therefore in
the majority of cases a parallel specified crystal can be used
with the MPC950 with just a minor frequency error due to the
actual series resonant frequency of the parallel resonant spe-
cified crystal. Typically a parallel specified crystal used in a
series resonant mode will exhibit an oscillatory frequency a
few hundred ppm lower than the specified value. For most
processor implementations a few hundred ppm translates into
kHz inaccuracies, a level which does not represent a major
issue.
Table 3. Crystal Recommendation
Parameter
Value
Crystal Cut
Fundamental AT Cut
Resonance
Series Resonance*
Frequency Tolerance
±75ppm at 25°C
Frequency/Temperature Stability
±150ppm 0 to 70°C
Operating Range
0 to 70
°C
Shunt Capacitance
5–7pF
Equivalent Series Resistance (ESR)
50 to 80
Max
Correlation Drive Level
100
W
Aging
5ppm/Yr (First 3 Years)
* See accompanying text for series versus parallel resonant discus-
sion.
The MPC950 is a clock driver which was designed to gener-
ate outputs with programmable frequency relationships and
not a synthesizer with a fixed input frequency. As a result the
crystal input frequency is a function of the desired output fre-
quency. To determine the crystal required to produce the de-
sired output frequency for an application which utilizes internal
feedback the block diagram of Figure 9 should be used. The P
and the M values for the MPC950 are also included in Figure 9.
The M values can be found in the configuration tables included
in this applications section.
2
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