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参数资料
| 型号： | MPC9991FAR2 |
| 厂商： | MOTOROLA INC |
| 元件分类： | 时钟及定时 |
| 英文描述： | PLL BASED CLOCK DRIVER, 13 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PQFP52 |
| 封装： | LQFP-52 |
| 文件页数： | 9/16页 |
| 文件大小： | 215K |
| 代理商： | MPC9991FAR2 |
MPC9991
MOTOROLA
TIMING SOLUTIONS
2
Figure 1. MPC9991 Logic Diagram
0
1
0
1
0
1
4
All input resistors have a value of 50k
0
1
VCC
3
PLL
÷2, ÷4, ÷6, ÷8
QFB
ECLK
TCLK
FSEL[3:0]
QA0
QA1
QA2
QA3
QB0
QB1
QB2
QB3
QC0
QC1
Bank A
Bank B
Bank C
VCO
Ref
FB
Sync Pulse
÷2, ÷4, ÷6, ÷8
÷16, ÷24, ÷32
÷2, ÷4, ÷6, ÷8
QC2
QD0
FSEL_FB[2:0]
SYNC_SEL
MR
REF_SEL
FB_IN
VCO_SEL
PLL_EN
800–1600 MHz
÷2
÷4
Bank D
÷2, ÷4, ÷6, ÷8
FB_IN
QFB
QD0
QD1
QC0
QC1
QC2
QB0
QB1
QB2
QB3
QA0
QA1
QA2
QA3
FUNCTION TABLE
Control
Default
0
1
REF_SEL
0
Selects ECLK, ECLK as PLL refererence signal input
Selects TCKL as PLL reference signal input
VCO_SEL
0
Selects VCO
÷2. (high input frequency range)
Selects VCO
÷4. The VCO frequency is scaled by a factor
of 4 (low input frequency range).
PLL_EN
0
Normal operation mode with PLL enabled.
Test mode with the PLL bypassed. The reference clock is
substituted for the internal VCO output. MPC9991 is fully
static and no minimum frequency limit applies. All PLL
related AC characteristics are not applicable.
MR
0
Normal operation
Reset of the device. During reset the PLL feedback loop is
open and the internal VCO is tied to its lowest frequency.
The MPC9991 requires reset at power-up and after any
loss of PLL lock. Loss of PLL lock may occur when the
external feedback path is interrupted. The length of the
reset pulse should be greater than one reference clock
cycle (CCLKx)
SYNC_SEL
0
QD[1:0] outputs generate a SYNC signal
QD[1:0] outputs generate clock signals that match the
QC[2:0] outputs
VCO_SEL, FSEL[3:0] and FSEL_FB[2:0] control the operating PLL frequency range and input/output frequency ratios.
See Table 2 and Table 3 for the device frequency configuration.
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相关代理商/技术参数 |
参数描述 |
|---|---|
| MPC9992 | 制造商:MOTOROLA 制造商全称:Motorola, Inc 功能描述:3.3 DIFFRERENTIAL ECL/PECL PLL CLOCK GENERATOR |
| MPC9992AC | 功能描述:时钟发生器及支持产品 RoHS:否 制造商:Silicon Labs 类型:Clock Generators 最大输入频率:14.318 MHz 最大输出频率:166 MHz 输出端数量:16 占空比 - 最大:55 % 工作电源电压:3.3 V 工作电源电流:1 mA 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:QFN-56 |
| MPC9992ACR2 | 功能描述:时钟发生器及支持产品 RoHS:否 制造商:Silicon Labs 类型:Clock Generators 最大输入频率:14.318 MHz 最大输出频率:166 MHz 输出端数量:16 占空比 - 最大:55 % 工作电源电压:3.3 V 工作电源电流:1 mA 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:QFN-56 |
| MPC9992FA | 功能描述:锁相环 - PLL 2.5 3.3V 400MHz Clock Generator RoHS:否 制造商:Silicon Labs 类型:PLL Clock Multiplier 电路数量:1 最大输入频率:710 MHz 最小输入频率:0.002 MHz 输出频率范围:0.002 MHz to 808 MHz 电源电压-最大:3.63 V 电源电压-最小:1.71 V 最大工作温度:+ 85 C 最小工作温度:- 40 C 封装 / 箱体:QFN-36 封装:Tray |
| MPC9992FAR2 | 制造商:Integrated Device Technology Inc 功能描述:PLL Clock Driver Single 32-Pin LQFP T/R |
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