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参数资料
| 型号： | MPC9992FAR2 |
| 厂商： | MOTOROLA INC |
| 元件分类： | 时钟产生/分配 |
| 英文描述： | 400 MHz, OTHER CLOCK GENERATOR, PQFP32 |
| 封装： | LQFP-32 |
| 文件页数： | 8/12页 |
| 文件大小： | 153K |
| 代理商： | MPC9992FAR2 |
MPC9992
TIMING SOLUTIONS
5
MOTOROLA
Table 6. DC Characteristics (VCC = 3.3V ± 5%, GND = 0V, TA = 0°C to 70°C)
Symbol
Characteristics
Min
Typ
Max
Unit
Condition
Differential PECL Clock Inputs (PCLK, PCLK)1
1.
Clock inputs driven by PECL compatible signals.
VPP
AC Differential Input Voltage2
2.
VPP (DC) is the minimum differential input voltage swing required to maintain device functionality.
0.2
1.3
V
Differential operation
VCMR
Differential Cross Point Voltage3
3.
VCMR (DC) is the crosspoint of the differential input signal. Functional operation is obtained when the crosspoint is within the VCMR (DC)
range and the input swing lies within the VPP (DC) specification.
1.0
VCC-0.3
V
Differential operation
IIN
Input Current4
4.
Inputs have pull-down resistors affecting the input current.
±120
A
VIN=VCC or GND
LVCMOS Control Inputs (VCO_SEL, PLL_EN, MR/STOP, REF_SEL, FSEL[1:0])
VIH
Input High Voltage
2.0
VCC + 0.3
V
LVCMOS
VIL
Input Low Voltage
0.8
V
LVCMOS
IIN
Input Current4
±120
A
VIN=VCC or GND
PECL Clock Outputs (QA[3:0], QA[3:0], QB[2:0], QB[2:0], QSYNC, QSYNC)
VOH
Output High Voltage
VCC–1.025
VCC–0.880
V
IOH = –30 mA
5
5.
Equivalent to a termination of 50
to V
TT.
VOL
Output Low Voltage
VCC–1.920
VCC–1.620
V
IOL = –5 mA
Supply Current and Voltage
VCC_PLL
PLL Supply Voltage
2.955
VCC
V
VCC_PLL pin
ICC_PLL
Maximum PLL Supply Current
9.0
12
mA
VCC_PLL pin
IGND
6
6.
Does not include output drive current which is dependant on output termination methods.
Maximum Supply Current
80
110
mA
GND pins
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