参数资料
型号: MSC1210Y4PAGR
厂商: TEXAS INSTRUMENTS INC
元件分类: 微控制器/微处理器
英文描述: 8-BIT, FLASH, 33 MHz, MICROCONTROLLER, PQFP64
封装: GREEN, PLASTIC, TQFP-64
文件页数: 17/94页
文件大小: 913K
代理商: MSC1210Y4PAGR
MSC1210
SBAS203J MARCH 2002 REVISED JANUARY 2008
www.ti.com
24
A
IN3
A
IN4
A
IN5
A
IN6
A
IN0
A
IN1
A
IN2
A
IN7
A
IN CO M
Burnout Detect
Current Source
Burnout Detect
Current Sink
AGND
Temperature Sensor
I
80
I
AV
DD
In+
In
Figure 13. Input Multiplexer Configuration
BURNOUT DETECT
When the Burnout Detect (BOD) bit is set in the ADC
control configuration register (ADCON0 DCh), two current
sources are enabled. The current source on the positive
input channel sources approximately 2
A of current. The
current source on the negative input channel sinks
approximately 2
A. This allows for the detection of an
open circuit (full-scale reading) or short circuit (small
differential reading) on the selected input differential pair.
Buffer should be on for sensor burnout detection.
ADC INPUT BUFFER
The analog input impedance is always high, regardless of
PGA setting (when the buffer is enabled). With the buffer
enabled, the input voltage range is reduced and the analog
power-supply current is higher. If the limitation of input
voltage range is acceptable, then the buffer is always
preferred.
The input impedance of the MSC1210 without the buffer is
7M
/PGA. The buffer is controlled by the state of the BUF
bit in the ADC control register (ADCON0 DCh).
ADC ANALOG INPUT
When the buffer is not selected, the input impedance of the
analog input changes with ACLK clock frequency (ACLK
F6h) and gain (PGA). The relationship is:
Impedance (
W) +
1
f
SAMP @ CS
A
IN Impedance(W) +
106
ACLK Frequency
@ 7MW
PGA
where ACLK frequency
+
f
CLK
(ACLK
)1)
and modclk
+ f
MOD +
f
ACLK
64
.
NOTE: The input impedance for PGA = 128 is the same as that for
PGA = 64 (
that is,
7M
W
64
).
Figure 14 shows the basic input structure of the MSC1210.
BIPOLAR MODE
UNIPOLAR MODE
PGA
FULL-SCALE RANGE
fSAMP
1
±VREF
+VREF
fMOD
2
±VREF/2
+VREF/2
fMOD
4
±VREF/4
+VREF/4
fMOD
8
±VREF/8
+VREF/8
fMOD S 2
16
±VREF/16
+VREF/16
fMOD S 4
32
±VREF/32
+VREF/32
fMOD S 8
64
±VREF/64
+VREF/64
fMOD S 16
128
±VREF/128
+VREF/128
fMOD S 16
NOTE:
fMOD = ACLK frequency/64
R
SWITCH
(3k typical)
Sampling
Frequency = f
SAMP
High
Impedance
>1G
C
S
AGND
A
IN
(9pF typical)
PGA
C
S
1
9pF
2
18pF
4to128
36pF
Figure 14. Analog Input Structure
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