参数资料
型号: MSC1210Y4PAGR
厂商: TEXAS INSTRUMENTS INC
元件分类: 微控制器/微处理器
英文描述: 8-BIT, FLASH, 33 MHz, MICROCONTROLLER, PQFP64
封装: GREEN, PLASTIC, TQFP-64
文件页数: 22/94页
文件大小: 913K
代理商: MSC1210Y4PAGR
MSC1210
SBAS203J MARCH 2002 REVISED JANUARY 2008
www.ti.com
29
FLASH MEMORY
The page size for Flash memory is 128 bytes. The
respective page must be erased before it can be written to,
regardless of whether it is mapped to Program or Data
Memory space. The MSC1210 uses a memory addressing
scheme that separates Program Memory (FLASH/ROM)
from Data Memory (FLASH/RAM). Each area is 64kB
beginning at address 0000h and ending at FFFFh, as
shown in Figure 18. The program and data segments can
overlap since they are accessed in different ways.
Program Memory is fetched by the microcontroller
automatically. There is one instruction (MOVC) that is
used to explicitly read the program area. This is commonly
used to read lookup tables.
The Data Memory area is accessed explicitly using the
MOVX instruction. This instruction provides multiple ways
of specifying the target address. It is used to access the
64kB of Data Memory. The address and data range of
devices with on-chip Program and Data Memory overlap
the 64kB memory space. When on-chip memory is
enabled, accessing memory in the on-chip range will
cause the device to access internal memory. Memory
accesses beyond the internal range will be addressed
externally via Ports 0 and 2.
The MSC1210 has two Hardware Configuration registers
(HCR0 and HCR1) that are programmable only during
Flash Memory Programming mode.
1k RAM or External
External Memory
Se
le
ct
in
MC
O
N
Se
le
c
t
in
HCR0
0000h, 0k
1FFFh, 8k (Y3)
0FFFh, 4k (Y2)
3FFFh, 16k (Y4)
8400h
7FFFh, 32k (Y5)
2k Internal Boot ROM
F800h
FFFFh
External
Program
Memory
Mapped to Both
Memory Spaces
(von Neumann)
8800h
S
e
le
c
t
in
MC
O
N
03FFh, 1k
13FFh, 5k (Y2)
23FFh, 9k (Y3)
43FFh, 17k (Y4)
83FFh, 33k (Y5)
FFFFh
External
Data
Memory
Program
Memory
Data
Memory
8800h
OnChip
Flash
OnChip
Flash
Programming
Mode
Address
User
Application
Mode
Address(1)
NOTE: (1) Can be accessed using CADDR
or the faddr_data_read Boot ROM routine.
UAM: Read Only
FPM: Read Only
UAM: Read Only
FPM: Read/Write
UAM: Read Only
FPM: Read/Write
807Fh
8000h
8070h
7Fh
8079h
79h
00h
70h
Configuration
Memory
Figure 18. Memory Map
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