参数资料
型号: MT16JSF25664HY-80BXX
元件分类: DRAM
英文描述: 256M X 64 DDR DRAM MODULE, ZMA204
封装: LEAD FREE, MO-268, SODIMM-204
文件页数: 4/20页
文件大小: 651K
代理商: MT16JSF25664HY-80BXX
PDF: 09005aef83021ee3/Source: 09005aef83021f5a
Micron Technology, Inc., reserves the right to change products or specifications without notice.
JSF16C256x64H.fm - Rev. B 6/09 EN
12
2008 Micron Technology, Inc. All rights reserved
2GB (x64, DR) 204-Pin DDR3 SDRAM SODIMM
Temperature Sensor with Serial Presence-Detect EEPROM
The temperature sensor continuously monitors the module’s temperature and can be
read back at any time over the I2C bus shared with the SPD EEPROM.
EVENT# Pin
The temperature sensor also adds the EVENT# pin (open drain). Not used by the SPD
EEPROM, EVENT# is a temperature sensor output used to flag critical events that can be
set up in the sensor’s configuration register.
EVENT# has three defined modes of operation: interrupt mode, compare mode, and
critical temperature mode. The open-drain output of EVENT# under the three separate
operating modes is illustrated in Figure 3 on page 13. Event thresholds are programmed
in the 0x01 register using a hysteresis. The alarm window provides a comparison
window, with upper and lower limits set in the alarm upper boundary register and the
alarm lower boundary register, respectively. When the alarm window is enabled,
EVENT# will trigger whenever the temperature is outside the MIN or MAX values set by
the user.
Table 10:
Temperature Sensor with Serial Presence-Detect EEPROM Operating Conditions
Parameter/Condition
Symbol
Min
Max
Units
Supply voltage
VDDSPD
+3.0
+3.6
V
Supply current: VDD = 3.3V
IDD
–+2.0
mA
Input high voltage: Logic 1; SCL, SDA
VIH
+1.45
VDDSPD + 1
V
Input low voltage: Logic 0; SCL, SDA
VIL
–+0.55
V
Output low voltage: IOUT = 2.1mA
VOL
–+0.4
V
Input current
IIN
–5.0
+5.0
A
Temperature sensing range
–40
+125
°C
Temperature sensor accuracy (initial release)
–2.0
+2.0
°C
Temperature sensor accuracy
–1.0
+1.0
°C
Table 11:
Sensor and EEPROM Serial Interface Timing
Parameter/Condition
Symbol
Min
Max
Units
Time bus must be free before a new transition can start
tBUF
4.7
s
SDA fall time
tF20
300
ns
SDA rise time
tR
1,000
ns
Data hold time
tHD:DAT
200
900
ns
Start condition hold time
tH:STA
4.0
s
Clock HIGH period
tHIGH
4.0
50
s
Clock LOW period
tLOW
4.7
s
SCL clock frequency
fSCL
10
100
kHz
Data setup time
tSU:DAT
250
ns
Start condition setup time
tSU:STA
4.7
s
Stop condition setup time
tSU:STO
4.0
s
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