参数资料
型号: MT46V32M4-1
厂商: Micron Technology, Inc.
英文描述: DOUBLE DATA RATE DDR SDRAM
中文描述: 双倍数据速率的DDR SDRAM内存
文件页数: 41/68页
文件大小: 2547K
代理商: MT46V32M4-1
41
128Mb: x4, x8, x16 DDR SDRAM
128Mx4x8x16DDR_C.p65
Rev. C; Pub. 4/01
Micron Technology, Inc., reserves the right to change products or specifications without notice.
2001, Micron Technology, Inc.
128Mb: x4, x8, x16
DDR SDRAM
PRELIMINARY
TRUTH TABLE 4
CURRENT STATE BANK
n
COMMAND TO BANK
m
(Notes: 1-6; notes appear below and on next page)
CURRENT STATE CS# RAS# CAS# WE#
Any
H
L
Idle
X
Row
L
Activating,
L
Active, or
L
Precharging
L
Read
L
(Auto-
L
Precharge
L
Disabled)
L
Write
L
(Auto-
L
Precharge
L
Disabled)
L
Read
L
(With Auto-
L
Precharge)
L
L
Write
L
(With Auto-
L
Precharge)
L
L
COMMAND/ACTION
DESELECT (NOP/continue previous operation)
NO OPERATION (NOP/continue previous operation)
Any Command Otherwise Allowed to Bank m
ACTIVE (select and activate row)
READ (select column and start READ burst)
WRITE (select column and start WRITE burst)
PRECHARGE
ACTIVE (select and activate row)
READ (select column and start new READ burst)
WRITE (select column and start WRITE burst)
PRECHARGE
ACTIVE (select and activate row)
READ (select column and start READ burst)
WRITE (select column and start new WRITE burst)
PRECHARGE
ACTIVE (select and activate row)
READ (select column and start new READ burst)
WRITE (select column and start WRITE burst)
PRECHARGE
ACTIVE (select and activate row)
READ (select column and start READ burst)
WRITE (select column and start new WRITE burst)
PRECHARGE
NOTES
X
H
X
L
H
H
L
L
H
H
L
L
H
H
L
L
H
H
L
L
H
H
L
X
H
X
H
L
L
H
H
L
L
H
H
L
L
H
H
L
L
H
H
L
L
H
X
H
X
H
H
L
L
H
H
L
L
H
H
L
L
H
H
L
L
H
H
L
L
7
7
7
7, 9
7,8
7
7, 3a
7, 9, 3a
7, 3a
7, 3a
NOTE:
1. This table applies when CKE
n-1
was HIGH and CKE
n
is HIGH (see Truth Table 2) and after
t
XSNR has been
met (if the previous state was self refresh).
2. This table describes alternate bank operation, except where noted (i.e., the current state is for bank
n
and
the commands shown are those allowed to be issued to bank
m,
assuming that bank
m
is in such a state
that the given command is allowable). Exceptions are covered in the notes below.
(Notes continue on next page)
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