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参数资料
| 型号： | MT4LC1M16E5DJ-6S |
| 厂商： | Micron Technology, Inc. |
| 英文描述： | EDO DRAM |
| 中文描述： | EDO公司的DRAM |
| 文件页数： | 8/24页 |
| 文件大小： | 385K |
| 代理商： | MT4LC1M16E5DJ-6S |
8
1 Meg x 16 EDO DRAM
D52_B.p65 – Rev. B; Pub. 3/01
Micron Technology, Inc., reserves the right to change products or specifications without notice.
2001, Micron Technology, Inc
16Mb: 1 MEG x16
EDO DRAM
CAPACITANCE
(Notes: 1, 2, 3, 5, 8; notes appear on pages 10-11)
PA RA METER
Input Capacitance: Addresses
Input Capacitance: RAS#, CASL#,CASH#, WE#, OE#
Input/Output Capacitance: DQ
SY MBOL MA X
C
I
1
C
I
2
C
IO
UNITS NOTES
pF
pF
pF
5
7
7
AC ELECTRICAL CHARACTERISTICS
(Notes: 2, 3, 9, 10, 11, 12; notes appear on pages 10-11); (V
CC
[MIN]
￡
V
CC
￡
V
CC
[MAX])
AC CHARACTERISTICS
PARAMETER
Access time from column address
Column-address setup to CAS# precharge
Column-address hold time (referenced to RAS#)
Column-address setup time
Row-address setup time
Column address to WE# delay time
Access time from CAS#
Column-address hold time
CAS# pulse width
CAS# LOW to “Don’t Care” during Self Refresh
CAS# hold time (CBR Refresh)
Last CAS# going LOW to first CAS# to return HIGH
CAS# to output in Low-Z
Data output hold after next CAS# LOW
CAS# precharge time
Access time from CAS# precharge
CAS# to RAS# precharge time
CAS# hold time
CAS# setup time (CBR Refresh)
CAS# to WE# delay time
WRITE command to CAS# lead time
Data-in hold time
Data-in setup time
Output disable
Output enable
OE# hold time from WE# during
READ-MODIFY-WRITE cycle
OE# HIGH hold from CAS# HIGH
OE# HIGH pulse width
OE# LOW to CAS# HIGH setup time
Output buffer turn-off delay
-5
-6
SYMBOL
t
AA
t
ACH
t
AR
t
ASC
t
ASR
t
AWD
t
CAC
t
CAH
t
CAS
t
CHD
t
CHR
t
CLCH
t
CLZ
t
COH
t
CP
t
CPA
t
CRP
t
CSH
t
CSR
t
CWD
t
CWL
t
DH
t
DS
t
OD
t
OE
t
OEH
MIN
MAX
25
MIN
MAX
30
UNITS NOTES
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
12
38
0
0
42
15
45
0
0
49
25
25
13
14, 25
25
27
13
15
8
8
15
8
5
0
3
8
10
10
15
10
5
0
3
10
10,000
10,000
7, 26
28
26
15, 30
26
26
26
7, 25
13, 25
26
16, 25
16, 25
28
35
5
38
5
28
8
8
0
0
5
45
5
35
10
10
0
0
12
12
15
15
17
18
8
10
t
OEHC
t
OEP
t
OES
t
OFF
5
5
4
0
10
5
5
0
ns
ns
ns
ns
18
12
15
20, 26
相关PDF资料 |
PDF描述 |
|---|---|
| MT4LC1M16E5 | EDO DRAM |
| MT4C4256 | 256K x 4 DRAM Standard Or Low Power, Extended Refresh(标准或低功率，扩展刷新，256K x 4动态RAM) |
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| MT4LC16M4T8TG-5 | DRAM |
| MT4LC16M4T8TG-5S | DRAM |
相关代理商/技术参数 |
参数描述 |
|---|---|
| MT4LC1M16E5TG-5 | 制造商:MICRON 制造商全称:Micron Technology 功能描述:EDO DRAM |
| MT4LC1M16E5TG-5S | 制造商:MICRON 制造商全称:Micron Technology 功能描述:EDO DRAM |
| MT4LC1M16E5TG6 | 制造商:MIT 功能描述:NEW |
| MT4LC1M16E5TG-6 | 制造商:MT 功能描述:Dynamic RAM, EDO, 1M x 16, 50 Pin, Plastic, TSOP |
| MT4LC1M16E5TG-6S | 制造商:MICRON 制造商全称:Micron Technology 功能描述:EDO DRAM |
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