参数资料
型号: MT9D011D00STC
元件分类: 图像传感器
英文描述: IMAGE SENSOR-CMOS, 15fps, 0.20-0.30V
封装: DIE
文件页数: 30/64页
文件大小: 1265K
代理商: MT9D011D00STC
PDF: 81516de4(master) 8159a774(ext)/Source: 81516da4
Micron Technology, Inc., reserves the right to change products or specifications without notice.
MT9D011__MI2010_E_2.fm - Rev. B 6/05 EN
36
2004 Micron Technology, Inc. All rights reserved.
MT9D011 - 1/3.2-Inch 2-Megapixel Digital Image Sensor
Registers
Preliminary
R194—0xC2 (194) Start Readout Time (T2) (r/w)
Bits 15:0
Start Readout
Time (T2)
These 16 bits are added to Reg0xC1 (start integration time)
and compared to the 24-bit counter mentioned for Reg0xC1.
The value defines the time from when integration time
starts to when it is guaranteed to end. Readout then
commences. Maximum allowed value is (0xDB11-Reg0xC1) +
0x0064.
64
N
R195—0xC3 - Assert Strobe Time (T3) (r/w)
Bits 15:0
Assert Strobe
Time (T3)
These 16 bits are compared to the upper bits of a 24-bit
counter, which starts counting master clocks when global
reset starts. When this value is reached, the strobe is
asserted.
96
N
R196—0xC4 - De-assert Strobe Time (T4) (r/w)
Bits 15:0
De-assert
Strobe Time
(T4)
These 16 bits are compared to the upper bits of a 24-bit
counter, which starts counting master clocks when global
reset starts. When this value is reached, the strobe is de-
asserted if strobe control is 0 (Reg0xC0[1]).
C8
N
R197—0xC5 - Assert Flash Time (r/w)
Bits 15:0
Assert Flash
Time
These 16 bits are compared to the upper bits of a 24-bit
counter, which starts counting master clocks when global
reset starts. When this value is reached, the flash is asserted.
64
N
R198—0xC6 - De-assert Flash Time (r/w)
Bits 15:0
De-assert Flash
Time
These 16 bits are compared to the upper bits of a 24-bit
counter, which starts counting master clocks when global
reset starts. When this value is reached, the flash is de-
asserted if flash control is 0 (Reg0xC0[2]).
78
N
R224—0xE0 - External Sampling 3 (R/o)
Bits 9:0
External
Sampling 3
Contains sample of AIN3 if external sampling is enabled
R225—0 E1 - External Sampling 2 (R/o)
Bits 9:0
External
Sampling 2
Contains sample of AIN2 if external sampling is enabled
(Reg0xE3[15] = 1).
R226—0xE2 - External Sampling 1 (R/o)
Bits 9:0
External
Sampling 1
Contains sample of AIN1 if external sampling is enabled
(Reg0xE3[15] = 1).
R227—0xE3 - External Sampling Control (R/W)
Bit 15
Enable
Sampling
1: Enable external sampling.
0: Disable external sampling.
0
N
Bit 14
Show Sample
If external sampling is enabled (Reg0xE3[15] = 1):
1: Show the external samples in the data stream after
LINE_VALID goes low.
0: Don’t show external samples in data stream.
0
N
Table 7:
Register Description (continued)
Bit Field
Description
Default
(hex)
Sync’d to
Frame Start
Bad
Frame
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